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[Qemu-devel] [PATCH v2 08/18] tcg/arm: use the blx instruction when poss
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH v2 08/18] tcg/arm: use the blx instruction when possible |
Date: |
Sat, 10 Apr 2010 03:32:56 +0200 |
Signed-off-by: Aurelien Jarno <address@hidden>
---
tcg/arm/tcg-target.c | 16 ++++++++++++----
1 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 8c55325..7758601 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -357,6 +357,11 @@ static inline void tcg_out_bl(TCGContext *s, int cond,
int32_t offset)
(((offset - 8) >> 2) & 0x00ffffff));
}
+static inline void tcg_out_blx(TCGContext *s, int cond, int rn)
+{
+ tcg_out32(s, (cond << 28) | 0x012fff30 | rn);
+}
+
static inline void tcg_out_dat_reg(TCGContext *s,
int cond, int opc, int rd, int rn, int rm, int shift)
{
@@ -778,10 +783,13 @@ static inline void tcg_out_call(TCGContext *s, int cond,
uint32_t addr)
static inline void tcg_out_callr(TCGContext *s, int cond, int arg)
{
- /* TODO: on ARMv5 and ARMv6 replace with tcg_out_blx(s, cond, arg); */
- tcg_out_dat_reg(s, cond, ARITH_MOV, TCG_REG_R14, 0,
- TCG_REG_PC, SHIFT_IMM_LSL(0));
- tcg_out_bx(s, cond, arg);
+ if (use_armv5_instructions) {
+ tcg_out_blx(s, cond, arg);
+ } else {
+ tcg_out_dat_reg(s, cond, ARITH_MOV, TCG_REG_R14, 0,
+ TCG_REG_PC, SHIFT_IMM_LSL(0));
+ tcg_out_bx(s, cond, arg);
+ }
}
static inline void tcg_out_goto_label(TCGContext *s, int cond, int label_index)
--
1.7.0.4
- [Qemu-devel] [PATCH v2 0/18] tcg/arm: cleanup and improvements, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 05/18] tcg/arm: align 64-bit arguments in function calls, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 01/18] tcg/arm: remove SAVE_LR code, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 04/18] tcg/arm: replace integer values by registers enum, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 02/18] tcg/arm: explicitely list clobbered/reserved regs, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 07/18] tcg/arm: sxtb and sxth are available starting with ARMv6, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 03/18] tcg/arm: remove store signed functions, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 08/18] tcg/arm: use the blx instruction when possible,
Aurelien Jarno <=
- [Qemu-devel] [PATCH v2 09/18] tcg/arm: add rotation ops, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 06/18] tcg/arm: add variables to define the allowed instructions set, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 10/18] tcg/arm: add ext16u op, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 11/18] tcg/arm: add bswap ops, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 12/18] tcg/arm: remove conditional argument for qemu_ld/st, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 16/18] tcg/arm: fix argument alignment in qemu_st64, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 18/18] tcg/arm: don't try to load constants using pc, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 17/18] tcg/arm: optimize register allocation order, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 13/18] tcg/arm: use ext* ops in qemu_ld, Aurelien Jarno, 2010/04/09
- [Qemu-devel] [PATCH v2 15/18] tcg/arm: remove useless register tests in qemu_ld/st, Aurelien Jarno, 2010/04/09