Re: [Qemu-devel] [PATCH 2/2] target-ppc: fix interrupt vectors for MPC603 and e300

[Hollis Blanchard]

On Wed, Apr 21, 2010 at 5:36 AM, Alexander Graf <address@hidden> wrote:
> Thomas Monjalon wrote:
>> Alexander Graf wrote:
>>
>>>> --- a/target-ppc/translate_init.c
>>>> +++ b/target-ppc/translate_init.c
>>>> @@ -2853,7 +2853,16 @@ static void init_excp_603 (CPUPPCState *env)
>>>>     env->excp_vectors[POWERPC_EXCP_SMI]      = 0x00001400;
>>>>     env->hreset_excp_prefix = 0x00000000UL;
>>>>     /* Hardware reset vector */
>>>> -    env->hreset_vector = 0xFFFFFFFCUL;
>>>> +    env->hreset_vector = 0x00000100UL;
>>>>
>>> Are you 100% sure this is correct? IIRC the reset vector is dictated by the
>>> CPU initialization sequence, so there's no hardwired value here really.
>>>
>>
>> It is explained in [e300CORERM] at chapters 5.2.3, 5.5.1.1 and 8.3.3.
>> Clearly, the vector offset is 0x100 and the exception prefix can be 0 or
>> 0xFFF00000, depending of the MSR[IP] bit.
>>
>> So, yes, I'm sure the value of hreset_vector must be 0x100.
>> But hreset_excp_prefix can change. It could be another patch.
>>
>
> Interesting. That's different from 970.

Only Book E processors come out of reset with a PC of 0xfffffffc.
"Classic" PowerPC comes out with PC 0xfff00100 (the FFF part specified
by MSR[IP]).

970 may be a bad example in that it can't actually bring itself up --
it requires an external controller to configure it at power-up. So
whatever the external controller programs into the PC is where it
starts. I don't see any mention of an initial PC value in the 970 user
manuals.

Qemu ignores these details and pretends that all PowerPC start at
0xffffffc. As long as you have qemu-specific firmware that expects
this behavior, you're ok...

-Hollis