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[Qemu-devel] [PATCH 02/10] target-mips: add microMIPS-specific bits to m
From: |
Nathan Froyd |
Subject: |
[Qemu-devel] [PATCH 02/10] target-mips: add microMIPS-specific bits to mips-defs.h |
Date: |
Thu, 20 May 2010 07:52:22 -0700 |
There's a new ASE_MICROMIPS instruction flag, and some extra CP0_Config3
fields. The ISA and ISA_ON_EXC fields are specific to microMIPS. The
DSP2P is for version 2 of the DSP ASE.
Signed-off-by: Nathan Froyd <address@hidden>
---
target-mips/cpu.h | 3 +++
target-mips/mips-defs.h | 1 +
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 7285636..986d938 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -363,6 +363,9 @@ struct CPUMIPSState {
#define CP0C2_SA 0
int32_t CP0_Config3;
#define CP0C3_M 31
+#define CP0C3_ISA_ON_EXC 16
+#define CP0C3_ISA 14
+#define CP0C3_DSP2P 11
#define CP0C3_DSPP 10
#define CP0C3_LPA 7
#define CP0C3_VEIC 6
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index c57de02..a7f4697 100644
--- a/target-mips/mips-defs.h
+++ b/target-mips/mips-defs.h
@@ -38,6 +38,7 @@
#define ASE_DSPR2 0x00010000
#define ASE_MT 0x00020000
#define ASE_SMARTMIPS 0x00040000
+#define ASE_MICROMIPS 0x00080000
/* Chip specific instructions. */
#define INSN_VR54XX 0x80000000
--
1.6.3.2
- [Qemu-devel] [PATCH 00/10] target-mips: add microMIPS ASE support, Nathan Froyd, 2010/05/20
- [Qemu-devel] [PATCH 02/10] target-mips: add microMIPS-specific bits to mips-defs.h,
Nathan Froyd <=
- [Qemu-devel] [PATCH 01/10] target-mips: break out [ls][wd]c1 and rdhwr insn generation, Nathan Froyd, 2010/05/20
- [Qemu-devel] [PATCH 05/10] target-mips: small changes to use new FMT_ enums, Nathan Froyd, 2010/05/20
- [Qemu-devel] [PATCH 07/10] target-mips: add microMIPS CPUs, Nathan Froyd, 2010/05/20
- [Qemu-devel] [PATCH 06/10] target-mips: add microMIPS ASE support, Nathan Froyd, 2010/05/20
- [Qemu-devel] [PATCH 08/10] target-mips: add microMIPS exception handler support, Nathan Froyd, 2010/05/20
- [Qemu-devel] [PATCH 03/10] target-mips: add enum constants for various invocations of FOP, Nathan Froyd, 2010/05/20
- [Qemu-devel] [PATCH 04/10] target-mips: refactor {c, abs}.cond.fmt insns, Nathan Froyd, 2010/05/20
- [Qemu-devel] [PATCH 10/10] hw: honor low bit in mipssim machine, Nathan Froyd, 2010/05/20