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[Qemu-devel] [PATCH 22/62] tcg-s390: Tidy branches.
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 22/62] tcg-s390: Tidy branches. |
Date: |
Thu, 27 May 2010 13:46:04 -0700 |
Add tgen_gotoi to implement conditional and unconditional direct
branches. Add tgen_branch to implement branches to labels.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/s390/tcg-target.c | 96 ++++++++++++++++++++++++++++---------------------
1 files changed, 55 insertions(+), 41 deletions(-)
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 21ad1a3..f4dab1a 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -41,8 +41,9 @@
halves of the 16-bit quantity may appear 32 bits apart in the insn.
This makes it easy to copy the values from the tables in Appendix B. */
typedef enum S390Opcode {
- RIL_LARL = 0xc000,
RIL_BRASL = 0xc005,
+ RIL_BRCL = 0xc004,
+ RIL_LARL = 0xc000,
RI_AGHI = 0xa70b,
RI_AHI = 0xa70a,
@@ -175,17 +176,27 @@ static const int tcg_target_call_oarg_regs[] = {
/* signed/unsigned is handled by using COMPARE and COMPARE LOGICAL,
respectively */
+
+#define S390_CC_EQ 8
+#define S390_CC_LT 4
+#define S390_CC_GT 2
+#define S390_CC_OV 1
+#define S390_CC_NE (S390_CC_LT | S390_CC_GT)
+#define S390_CC_LE (S390_CC_LT | S390_CC_EQ)
+#define S390_CC_GE (S390_CC_GT | S390_CC_EQ)
+#define S390_CC_ALWAYS 15
+
static const uint8_t tcg_cond_to_s390_cond[10] = {
- [TCG_COND_EQ] = 8,
- [TCG_COND_LT] = 4,
- [TCG_COND_LTU] = 4,
- [TCG_COND_LE] = 8 | 4,
- [TCG_COND_LEU] = 8 | 4,
- [TCG_COND_GT] = 2,
- [TCG_COND_GTU] = 2,
- [TCG_COND_GE] = 8 | 2,
- [TCG_COND_GEU] = 8 | 2,
- [TCG_COND_NE] = 4 | 2 | 1,
+ [TCG_COND_EQ] = S390_CC_EQ,
+ [TCG_COND_LT] = S390_CC_LT,
+ [TCG_COND_LTU] = S390_CC_LT,
+ [TCG_COND_LE] = S390_CC_LE,
+ [TCG_COND_LEU] = S390_CC_LE,
+ [TCG_COND_GT] = S390_CC_GT,
+ [TCG_COND_GTU] = S390_CC_GT,
+ [TCG_COND_GE] = S390_CC_GE,
+ [TCG_COND_GEU] = S390_CC_GE,
+ [TCG_COND_NE] = S390_CC_NE,
};
#ifdef CONFIG_SOFTMMU
@@ -455,6 +466,31 @@ static void tgen_setcond(TCGContext *s, TCGType type,
TCGCond c,
tcg_out_movi(s, type, dest, 0);
}
+static void tgen_gotoi(TCGContext *s, int cc, tcg_target_long dest)
+{
+ tcg_target_long off = (dest - (tcg_target_long)s->code_ptr) >> 1;
+ if (off > -0x8000 && off < 0x7fff) {
+ tcg_out_insn(s, RI, BRC, cc, off);
+ } else if (off == (int32_t)off) {
+ tcg_out_insn(s, RIL, BRCL, cc, off);
+ } else {
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R13, dest);
+ tcg_out_insn(s, RR, BCR, cc, TCG_REG_R13);
+ }
+}
+
+static void tgen_branch(TCGContext *s, int cc, int labelno)
+{
+ TCGLabel* l = &s->labels[labelno];
+ if (l->has_value) {
+ tgen_gotoi(s, cc, l->u.value);
+ } else {
+ tcg_out16(s, RIL_BRCL | (cc << 4));
+ tcg_out_reloc(s, s->code_ptr, R_390_PC32DBL, labelno, -2);
+ s->code_ptr += 4;
+ }
+}
+
#if defined(CONFIG_SOFTMMU)
static void tcg_prepare_qemu_ldst(TCGContext* s, int data_reg, int addr_reg,
int mem_index, int opc,
@@ -507,7 +543,7 @@ static void tcg_prepare_qemu_ldst(TCGContext* s, int
data_reg, int addr_reg,
label1_ptr = (uint16_t*)s->code_ptr;
/* je label1 (offset will be patched in later) */
- tcg_out_insn(s, RI, BRC, 8, 0);
+ tcg_out_insn(s, RI, BRC, S390_CC_EQ, 0);
/* call load/store helper */
#if TARGET_LONG_BITS == 32
@@ -551,7 +587,7 @@ static void tcg_prepare_qemu_ldst(TCGContext* s, int
data_reg, int addr_reg,
/* jump to label2 (end) */
*label2_ptr_p = (uint16_t*)s->code_ptr;
- tcg_out_insn(s, RI, BRC, 15, 0);
+ tcg_out_insn(s, RI, BRC, S390_CC_ALWAYS, 0);
/* this is label1, patch branch */
*(label1_ptr + 1) = ((unsigned long)s->code_ptr -
@@ -734,16 +770,13 @@ static void tcg_out_qemu_st(TCGContext* s, const TCGArg*
args, int opc)
static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
const TCGArg *args, const int *const_args)
{
- TCGLabel* l;
S390Opcode op;
switch (opc) {
case INDEX_op_exit_tb:
/* return value */
tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2, args[0]);
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R13, (unsigned long)tb_ret_addr);
- /* br %r13 */
- tcg_out_insn(s, RR, BCR, 15, TCG_REG_R13);
+ tgen_gotoi(s, S390_CC_ALWAYS, (unsigned long)tb_ret_addr);
break;
case INDEX_op_goto_tb:
@@ -763,7 +796,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
/* load address stored at s->tb_next + args[0] */
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_R13, TCG_REG_R13, 0);
/* and go there */
- tcg_out_insn(s, RR, BASR, TCG_REG_R13, TCG_REG_R13);
+ tcg_out_insn(s, RR, BCR, S390_CC_ALWAYS, TCG_REG_R13);
}
s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
break;
@@ -971,16 +1004,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
goto do_shift64;
case INDEX_op_br:
- l = &s->labels[args[0]];
- if (l->has_value) {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R13, l->u.value);
- } else {
- /* larl %r13, ... */
- tcg_out16(s, RIL_LARL | (TCG_REG_R13 << 4));
- tcg_out_reloc(s, s->code_ptr, R_390_PC32DBL, args[0], -2);
- s->code_ptr += 4;
- }
- tcg_out_insn(s, RR, BASR, TCG_REG_R13, TCG_REG_R13);
+ tgen_branch(s, S390_CC_ALWAYS, args[0]);
break;
case INDEX_op_brcond_i64:
@@ -989,17 +1013,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode
opc,
case INDEX_op_brcond_i32:
tgen32_cmp(s, args[2], args[0], args[1]);
do_brcond:
- l = &s->labels[args[3]];
- if (l->has_value) {
- tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R13, l->u.value);
- } else {
- /* larl %r13, ... */
- tcg_out16(s, RIL_LARL | (TCG_REG_R13 << 4));
- tcg_out_reloc(s, s->code_ptr, R_390_PC32DBL, args[3], -2);
- s->code_ptr += 4;
- }
- /* bcr cond, %r13 */
- tcg_out_insn(s, RR, BCR, tcg_cond_to_s390_cond[args[2]], TCG_REG_R13);
+ tgen_branch(s, tcg_cond_to_s390_cond[args[2]], args[3]);
break;
case INDEX_op_setcond_i32:
@@ -1194,7 +1208,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
tcg_out_insn(s, RI, AGHI, TCG_REG_R15, -160);
/* br %r2 (go to TB) */
- tcg_out_insn(s, RR, BCR, 15, TCG_REG_R2);
+ tcg_out_insn(s, RR, BCR, S390_CC_ALWAYS, TCG_REG_R2);
tb_ret_addr = s->code_ptr;
@@ -1202,7 +1216,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
tcg_out_insn(s, RXY, LMG, TCG_REG_R6, TCG_REG_R15, TCG_REG_R15, 208);
/* br %r14 (return) */
- tcg_out_insn(s, RR, BCR, 15, TCG_REG_R14);
+ tcg_out_insn(s, RR, BCR, S390_CC_ALWAYS, TCG_REG_R14);
}
static inline void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
--
1.7.0.1
- [Qemu-devel] [PATCH 10/62] tcg-s390: R6 is a function argument register, (continued)
- [Qemu-devel] [PATCH 10/62] tcg-s390: R6 is a function argument register, Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 14/62] tcg-s390: Define tcg_target_reg_names., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 13/62] tcg-s390: Add -m64 and -march to s390x compilation., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 16/62] tcg-s390: Compute is_write in cpu_signal_handler., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 19/62] tcg-s390: Fixup qemu_ld/st opcodes., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 18/62] tcg-s390: Use matching constraints., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 20/62] tcg-s390: Implement setcond., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 15/62] tcg-s390: Update disassembler from binutils head., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 17/62] tcg-s390: Reorganize instruction emission, Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 21/62] tcg-s390: Generalize the direct load/store emission., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 22/62] tcg-s390: Tidy branches.,
Richard Henderson <=
- [Qemu-devel] [PATCH 23/62] tcg-s390: Add tgen_calli., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 25/62] tcg-s390: Re-implement tcg_out_movi., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 24/62] tcg-s390: Implement div2., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 26/62] tcg-s390: Implement sign and zero-extension operations., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 27/62] tcg-s390: Implement bswap operations., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 28/62] tcg-s390: Implement rotates., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 29/62] tcg-s390: Use LOAD COMPLIMENT for negate., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 30/62] tcg-s390: Tidy unimplemented opcodes., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 31/62] tcg-s390: Use the extended-immediate facility for add/sub., Richard Henderson, 2010/05/27
- [Qemu-devel] [PATCH 32/62] tcg-s390: Implement immediate ANDs., Richard Henderson, 2010/05/27