[Qemu-devel] Re: [SeaBIOS] [PATCH 0/7] abstract chipset(i440fx) specific register operation.

[Isaku Yamahata]

On Mon, Jul 12, 2010 at 08:50:55PM -0400, Kevin O'Connor wrote:
> On Mon, Jul 12, 2010 at 08:47:45PM +0900, Isaku Yamahata wrote:
> > This patch set abstract out chipset specific operation,
> > and spit out i440fx specific operation into dev-i440fx.c with it.
> > Thus q35 specific register value/operation will be added easily.
> 
> Hi Isaku,
> 
> Can you give a brief overview on what patch series are remaining, and
> what the final "q35" support will entail?

Oh yes, I should have depict the overview.
You can get my local seabios repo from the below.

    git clone http://people.valinux.co.jp/~yamahata/qemu/q35/seabios

This is not for review, but for those who want to try qemu q35/pcie.
So it contains change sets which won't be accepted to the upstream.


I have 3 patches in my posting with what I already posted.

overriding DSDT: I already posted it.
  seabios: acpi: allow qemu to load dsdt as external acpi table.
  Due to rom size limit, it isn't an option to have 2 DSDT in seabios,
  one for i440fx, one for q35.

split out i440fx specific part: This patch series.
  I suppose, you want redesign.

acpi MCFG support: single patch
  seabios: acpi: add mcfg table.

q35 device specific part: single patch
  seabios: add q35 initialization functions.
  This patch adds 2 files(dev-q35.[ch]) and inserts q35 specific entries
  into initialization tables.

q35 DSDT: single patch
  seabios: q35: add dsdt.
  I'm not sure this should go into seabios or qemu because it isn't
  complied into seabios.


I have other patches, but they would need discussion about how they
should work. So I don't plan to push those soon.
I have 3 issues.

- paravirtualize pci bus numbering
  Currently pci bus is numbered continuously.
  i.e. (*pci_bus)++ in change set of f441666dbdf0e9f78442a6b33b086699ff6f5a21.
  On the other hand in real hardware case, bus numbers might be
  assigned non-contiguously. And some surely does. Probably those
  numbers are hard-coded in bios.
  It is also convenient for DSDT writers to assign pci bus number
  without the constraint that bus numbers be contiguously assigned.

  So I'd like to pass the bus numbering hits from qemu to seabios.
  This requires qemu enhancement which would require discussion.

- PCI bar assignment clean up
  Clean up of pci_bios_{io, mem, prefmem}_addr.
  This isn't a big issue.
  
- vga bios
  remove hard coded VBE physical address
  Gerd sent patches to address this, but there seems no progress yet.
  This is for the original vgabios. vgabios in seabioa seem under
  development.

-- 
yamahata