Re: [Qemu-devel] Question about qemu firmware configuration (fw_cfg) device

[Gleb Natapov]

On Mon, Jul 19, 2010 at 10:54:03AM -0500, Anthony Liguori wrote:
> On 07/19/2010 09:53 AM, Gleb Natapov wrote:
> >On Mon, Jul 19, 2010 at 09:45:58AM -0500, Anthony Liguori wrote:
> >>On 07/19/2010 02:33 AM, Gleb Natapov wrote:
> >>>On Mon, Jul 19, 2010 at 08:28:02AM +0100, Richard W.M. Jones wrote:
> >>>>On Mon, Jul 19, 2010 at 09:23:56AM +0300, Gleb Natapov wrote:
> >>>>>That what I am warring about too. If we are adding device we have to be
> >>>>>sure such device can actually exist on real hw too otherwise we may have
> >>>>>problems later.
> >>>>I don't understand why the constraints of real h/w have anything to do
> >>>>with this.  Can you explain?
> >>>>
> >>>Each time we do something not architectural it cause us troubles later.
> >>>So constraints of real h/w is our constrains to.
> >>Your constraints are purely artificial.
> >>
> >What is artificial about it? Each time we break them we safer.
> 
> Just because something doesn't fit as an ISA or PCI device doesn't
> mean it can't exist in real life.  There are plenty of one-off
> devices with odd interfaces.
And there are such that cause cpu to stall for 6.5 seconds when you do
io to them? I never said that we should implement ISA or PCI device, I
don't know why you bring them here.

> 
> >>There are plenty of places that something like fw_cfg could live and
> >>still do DMA.  It can directly hang off of the Southbridge.  It
> >>doesn't necessary need to be connected to the ISA/LPC buses.
> >Examples of real HW?
> 
> The IBM IMM, HP ILO, or Intel iAMT modules.  They basically play an
> identical role to fw_cfg.
> 
So what are their interfaces?  May be we should emulate one.

> >  And I am not against something that does DMA,
> >but that is not what proposed patch does. It provides magic io
> >instruction that CPU calls and when instruction completes memory is
> >updated. This is nothing like DMA.
> 
> Isn't this exactly what the interface for PCI DMA looks like since
> there's no standard DMA implementation?
> 
Every DMA that I know about support polling for completion or they can
issue interrupt at the end of transaction.  I am not even sure you can
design such HW that will stall cpu in IO instruction till some operation
is completed.

> >  Of course it is possible to add
> >proper DMA interface to fw_cfg, but should we do it for such a small
> >gain?
> 
> I think an ad-hoc DMA interface is perfectly reasonable to do.  I
> agree that adding a more generic DMA interface is overkill.
> 
It should look like real DMA at least. The justification for it should
be better than "In our project we don't what to do this and we don't
what to do that so our initrd is 100M now, so why not add hack to qemu
to load it 1 second faster so we can grow it some more".

--
                        Gleb.