Re: [Qemu-devel] [PATCH 17/20] [MIPS] qdev: convert esp scsi adapter to rc4030 device

[Artyom Tarasenko]

2010/8/1 Hervé Poussineau <address@hidden>:
> Use it in Jazz emulation
>
> Signed-off-by: Hervé Poussineau <address@hidden>
> ---
>  hw/esp.c       |   83 
> +++++++++++++++++++++++++++++++++++++++++++++++++++++---
>  hw/mips_jazz.c |    5 +---
>  2 files changed, 80 insertions(+), 8 deletions(-)
>
> diff --git a/hw/esp.c b/hw/esp.c
> index 349052a..d6a9824 100644
> --- a/hw/esp.c
> +++ b/hw/esp.c
> @@ -24,6 +24,8 @@
>
>  #include "sysbus.h"
>  #include "scsi.h"
> +#include "rc4030.h"

Putting RC4030Device into esp doesn't look clean to me. E.g. Sun
machines don't use RC4030, I'd suggest to keep esp logic machine
independent.

> +#include "qdev-addr.h"
>  #include "esp.h"
>
>  /* debug ESP card */
> @@ -82,6 +84,15 @@ struct ESPState {
>     void *dma_opaque;
>  };
>
> +typedef struct RC4030ESPState
> +{
> +    RC4030Device dev;
> +    target_phys_addr_t iobase;
> +    uint32_t irq;
> +    uint32_t dma;
> +    ESPState state;
> +} RC4030ESPState;
> +
>  #define ESP_TCLO   0x0
>  #define ESP_TCMID  0x1
>  #define ESP_FIFO   0x2
> @@ -356,11 +367,9 @@ static void esp_do_dma(ESPState *s)
>     }
>  }
>
> -static void esp_command_complete(SCSIBus *bus, int reason, uint32_t tag,
> -                                 uint32_t arg)
> +static void esp_command_complete1(ESPState *s, int reason, uint32_t tag,
> +                                  uint32_t arg)
>  {
> -    ESPState *s = DO_UPCAST(ESPState, busdev.qdev, bus->qbus.parent);
> -
>     if (reason == SCSI_REASON_DONE) {
>         DPRINTF("SCSI Command complete\n");
>         if (s->ti_size != 0)
> @@ -388,6 +397,20 @@ static void esp_command_complete(SCSIBus *bus, int 
> reason, uint32_t tag,
>     }
>  }
>
> +static void esp_command_complete(SCSIBus *bus, int reason, uint32_t tag,
> +                                 uint32_t arg)
> +{
> +    ESPState *s = DO_UPCAST(ESPState, busdev.qdev, bus->qbus.parent);
> +    esp_command_complete1(s, reason, tag, arg);
> +}
> +
> +static void esp_rc4030_command_complete(SCSIBus *bus, int reason,
> +                                        uint32_t tag, uint32_t arg)
> +{
> +    RC4030ESPState *rc4030 = container_of(bus->qbus.parent, RC4030ESPState, 
> dev.qdev);
> +    esp_command_complete1(&rc4030->state, reason, tag, arg);
> +}
> +
>  static void handle_ti(ESPState *s)
>  {
>     uint32_t dmalen, minlen;
> @@ -435,6 +458,12 @@ static void esp_hard_reset(DeviceState *d)
>     s->rregs[ESP_CFG1] = 7;
>  }
>
> +static void esp_rc4030_hard_reset(DeviceState *d)
> +{
> +    RC4030ESPState *s = container_of(d, RC4030ESPState, dev.qdev);
> +    esp_hard_reset(&s->state.busdev.qdev);
> +}
> +
>  static void esp_soft_reset(DeviceState *d)
>  {
>     ESPState *s = container_of(d, ESPState, busdev.qdev);
> @@ -682,6 +711,27 @@ static int esp_init1(SysBusDevice *dev)
>     return scsi_bus_legacy_handle_cmdline(&s->bus);
>  }
>
> +static int esp_rc4030_init1(RC4030Device *dev)
> +{
> +    RC4030ESPState *rc4030 = container_of(dev, RC4030ESPState, dev);
> +    ESPState *s = &rc4030->state;
> +    int io;
> +
> +    rc4030_init_irq(&rc4030->dev, &s->irq, rc4030->irq);
> +
> +    io = cpu_register_io_memory(esp_mem_read, esp_mem_write, s);
> +    cpu_register_physical_memory(rc4030->iobase, ESP_REGS << s->it_shift, 
> io);
> +
> +    qdev_init_gpio_in(&dev->qdev, parent_esp_reset, 1);
> +
> +    s->dma_memory_read = rc4030_dma_read;
> +    s->dma_memory_write = rc4030_dma_write;
> +    s->dma_opaque = rc4030_get_dma(rc4030->dma);
> +
> +    scsi_bus_new(&s->bus, &dev->qdev, 0, ESP_MAX_DEVS, 
> esp_rc4030_command_complete);
> +    return scsi_bus_legacy_handle_cmdline(&s->bus);
> +}
> +
>  static SysBusDeviceInfo esp_info = {
>     .init = esp_init1,
>     .qdev.name  = "esp",
> @@ -693,9 +743,34 @@ static SysBusDeviceInfo esp_info = {
>     }
>  };
>
> +static const VMStateDescription vmstate_rc4030_esp = {
> +    .name = "rc4030-esp",
> +    .version_id = 1,
> +    .minimum_version_id = 1,
> +    .fields      = (VMStateField []) {
> +        VMSTATE_STRUCT(state, RC4030ESPState, 0, vmstate_esp, ESPState),
> +        VMSTATE_END_OF_LIST()
> +    }
> +};
> +
> +static RC4030DeviceInfo esp_rc4030_info = {
> +    .qdev.name  = "rc4030-esp",
> +    .qdev.size  = sizeof(RC4030ESPState),
> +    .qdev.vmsd  = &vmstate_rc4030_esp,
> +    .qdev.reset = esp_rc4030_hard_reset,
> +    .init       = esp_rc4030_init1,
> +    .qdev.props = (Property[]) {
> +        DEFINE_PROP_TADDR("iobase", RC4030ESPState, iobase, 0x80002000),
> +        DEFINE_PROP_UINT32("irq",   RC4030ESPState, irq,    5),
> +        DEFINE_PROP_UINT32("dma",   RC4030ESPState, dma,    0),
> +        DEFINE_PROP_END_OF_LIST(),
> +    },
> +};
> +
>  static void esp_register_devices(void)
>  {
>     sysbus_register_withprop(&esp_info);
> +    rc4030_qdev_register(&esp_rc4030_info);
>  }
>
>  device_init(esp_register_devices)
> diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
> index 3c6a495..08175ab 100644
> --- a/hw/mips_jazz.c
> +++ b/hw/mips_jazz.c
> @@ -110,7 +110,6 @@ void mips_jazz_init (ram_addr_t ram_size,
>     NICInfo *nd;
>     PITState *pit;
>     DriveInfo *fd;
> -    qemu_irq esp_reset;
>     qemu_irq *cpu_exit_irq;
>     ram_addr_t ram_offset;
>     ram_addr_t bios_offset;
> @@ -207,9 +206,7 @@ void mips_jazz_init (ram_addr_t ram_size,
>     }
>
>     /* SCSI adapter */
> -    esp_init(0x80002000, 0,
> -             rc4030_dma_read, rc4030_dma_write, dmas[0],
> -             rc4030[5], &esp_reset);
> +    rc4030_create_simple("rc4030-esp");
>
>     /* Floppy */
>     if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
> --
> 1.7.1.GIT
>
>
>



-- 
Regards,
Artyom Tarasenko

solaris/sparc under qemu blog: http://tyom.blogspot.com/