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[Qemu-devel] [patch uq/master 8/8] Add savevm/loadvm support for MCE
From: |
Marcelo Tosatti |
Subject: |
[Qemu-devel] [patch uq/master 8/8] Add savevm/loadvm support for MCE |
Date: |
Mon, 04 Oct 2010 15:54:55 -0300 |
User-agent: |
quilt/0.47-1 |
Port qemu-kvm's
commit 1bab5d11545d8de5facf46c28630085a2f9651ae
Author: Huang Ying <address@hidden>
Date: Wed Mar 3 16:52:46 2010 +0800
Add savevm/loadvm support for MCE
MCE registers are saved/load into/from CPUState in
kvm_arch_save/load_regs. To simulate the MCG_STATUS clearing upon
reset, MSR_MCG_STATUS is set to 0 for KVM_PUT_RESET_STATE.
Signed-off-by: Marcelo Tosatti <address@hidden>
Index: qemu/target-i386/kvm.c
===================================================================
--- qemu.orig/target-i386/kvm.c
+++ qemu/target-i386/kvm.c
@@ -774,7 +774,7 @@ static int kvm_put_msrs(CPUState *env, i
struct kvm_msr_entry entries[100];
} msr_data;
struct kvm_msr_entry *msrs = msr_data.entries;
- int n = 0;
+ int i, n = 0;
kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs);
kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp);
@@ -794,6 +794,18 @@ static int kvm_put_msrs(CPUState *env, i
env->system_time_msr);
kvm_msr_entry_set(&msrs[n++], MSR_KVM_WALL_CLOCK, env->wall_clock_msr);
}
+#ifdef KVM_CAP_MCE
+ if (env->mcg_cap) {
+ if (level == KVM_PUT_RESET_STATE)
+ kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status);
+ else if (level == KVM_PUT_FULL_STATE) {
+ kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status);
+ kvm_msr_entry_set(&msrs[n++], MSR_MCG_CTL, env->mcg_ctl);
+ for (i = 0; i < (env->mcg_cap & 0xff); i++)
+ kvm_msr_entry_set(&msrs[n++], MSR_MC0_CTL + i,
env->mce_banks[i]);
+ }
+ }
+#endif
msr_data.info.nmsrs = n;
@@ -1001,6 +1013,15 @@ static int kvm_get_msrs(CPUState *env)
msrs[n++].index = MSR_KVM_SYSTEM_TIME;
msrs[n++].index = MSR_KVM_WALL_CLOCK;
+#ifdef KVM_CAP_MCE
+ if (env->mcg_cap) {
+ msrs[n++].index = MSR_MCG_STATUS;
+ msrs[n++].index = MSR_MCG_CTL;
+ for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++)
+ msrs[n++].index = MSR_MC0_CTL + i;
+ }
+#endif
+
msr_data.info.nmsrs = n;
ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data);
if (ret < 0)
@@ -1043,6 +1064,22 @@ static int kvm_get_msrs(CPUState *env)
case MSR_KVM_WALL_CLOCK:
env->wall_clock_msr = msrs[i].data;
break;
+#ifdef KVM_CAP_MCE
+ case MSR_MCG_STATUS:
+ env->mcg_status = msrs[i].data;
+ break;
+ case MSR_MCG_CTL:
+ env->mcg_ctl = msrs[i].data;
+ break;
+#endif
+ default:
+#ifdef KVM_CAP_MCE
+ if (msrs[i].index >= MSR_MC0_CTL &&
+ msrs[i].index < MSR_MC0_CTL + (env->mcg_cap & 0xff) * 4) {
+ env->mce_banks[msrs[i].index - MSR_MC0_CTL] = msrs[i].data;
+ break;
+ }
+#endif
}
}
- [Qemu-devel] [patch uq/master 0/8] port qemu-kvm's MCE support, Marcelo Tosatti, 2010/10/04
- [Qemu-devel] [patch uq/master 3/8] Expose thread_id in info cpus, Marcelo Tosatti, 2010/10/04
- [Qemu-devel] [patch uq/master 4/8] kvm: x86: add mce support, Marcelo Tosatti, 2010/10/04
- [Qemu-devel] [patch uq/master 2/8] iothread: use signalfd, Marcelo Tosatti, 2010/10/04
- [Qemu-devel] [patch uq/master 1/8] signalfd compatibility, Marcelo Tosatti, 2010/10/04
- [Qemu-devel] [patch uq/master 7/8] MCE: Relay UCR MCE to guest, Marcelo Tosatti, 2010/10/04