Re: [Qemu-devel] Which qemu ports actually work?

[Torbjorn Granlund]

Alexander Graf <address@hidden> writes:

  >  Please also keep in mind that PPC emulation is _very_ slow.
  > 
  > Why is it slow?
  
  Because we're flushing the TLB on almost every MMU opcode.

OK.  Does that mean the TLB never gets more than a single entry?
(I mean, do you flush the TLB before inserting a new entry into it?)

What is the reason for this flushing?

A related thing, related to cross endianess: I wrote a simulator many
years ago (around 1990) that turned memory "upside down" for cross
endianess.  I.e., a reference to address x was simulated as
*(memend-opsize-x), where memend points to the end of the area
simulating memory, opsize of the size in bytes of the operation.

The point of this is that one can use full-size native load or store
instructions, instead of many byte operations and shifts.

I never published this idea, but I assume it has been rediscovered and
is now a standard trick?

[Alex, excuse the duplicate, this message was bounced by nongnu.org's
MTA for bogus reasons.  It never appeared on the list.]

-- 
Torbjörn