qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [Patch] Small fix for qemu APIC for Mac OS X support


From: adq
Subject: Re: [Qemu-devel] [Patch] Small fix for qemu APIC for Mac OS X support
Date: Wed, 24 Nov 2010 02:40:52 +0000

On 23 November 2010 23:41, Alexander Graf <address@hidden> wrote:
>
> On 23.11.2010, at 22:25, adq wrote:
>
>> This patch ups the APIC version from 0x11 to 0x14. After that Mac OS X
>> loads successfully (with appropriate kexts, applesmc ain't hooked up
>> properly yet I see unfortunately).
>)
> AppleSMC emulation is upstream, but the ACPI entries are missing. Once you 
> add those, all is fine.

Ah yeah, I've just this minute added the DSDT entry from your patch
for the SMC device and it now works with the vanilla SMC driver. Nice
work!

It *is* annoying that IASL now erroneously(?) complains about the
hypen in "Name (_CID, "smc-napa")" though.

Adding the HPET DSDT data causes it  to claim it can't support the
hardware (and a zillion more DSDT errors); I'll have a play about with
that (perhaps its just the new DSDT validation stuff)..

I'm assuming we'll eventually be able to use the upcoming AHCI support
instead of adding ICH drivers or hacking the PIIX kext's plist (I'm
doing the latter).

Note: the boot loader from your site unfortunately didn't work with SL
- its just hangs loading the kernel. I'm successfully using the latest
"boot" file extracted from Chameleon and supplying it to qemu with a
"-kernel" parameter.

>> According to to the Intel IA-32 Software Developers Manual Vol 3 page
>> 290, the version should be 0x14 Pentium 4/Xeon CPUs anyway.
>>
>> Signed-off-by: Andrew de Quincey <address@hidden>
>>
>> diff --git a/hw/apic.c b/hw/apic.c
>> index 5f4a87c..20304e0 100644
>> --- a/hw/apic.c
>> +++ b/hw/apic.c
>> @@ -704,7 +704,7 @@ static uint32_t apic_mem_readl(void *opaque,
>> target_phys_addr_t addr)
>>         val = s->id << 24;
>>         break;
>>     case 0x03: /* version */
>> -        val = 0x11 | ((APIC_LVT_NB - 1) << 16); /* version 0x11 */
>> +        val = 0x14 | ((APIC_LVT_NB - 1) << 16); /* version 0x14 */
>
> What exactly changed between the versions? Did new registers get introduced 
> or subtle behavior change? Is there some proper documentation on the changed 
> between the apic versions?

I've been trying to find out; I'm still searching intel's docs to find
an 0x11 version to compare with :(

The failure mode is that mac os X SL whines about the APIC being an
unexpected version (0x11) and it wants 0x14 as a minimum.



reply via email to

[Prev in Thread] Current Thread [Next in Thread]