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[Qemu-devel] [PATCH 08/15] prep: Declare as little endian
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH 08/15] prep: Declare as little endian |
Date: |
Tue, 30 Nov 2010 15:35:54 +0100 |
This patch replaces explicit bswaps with endianness hints to the
mmio layer.
Signed-off-by: Alexander Graf <address@hidden>
---
hw/ppc_prep.c | 38 +++-----------------------------------
1 files changed, 3 insertions(+), 35 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 80f5db6..1492266 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -145,20 +145,12 @@ static uint32_t PPC_intack_readb (void *opaque,
target_phys_addr_t addr)
static uint32_t PPC_intack_readw (void *opaque, target_phys_addr_t addr)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- return bswap16(_PPC_intack_read(addr));
-#else
return _PPC_intack_read(addr);
-#endif
}
static uint32_t PPC_intack_readl (void *opaque, target_phys_addr_t addr)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- return bswap32(_PPC_intack_read(addr));
-#else
return _PPC_intack_read(addr);
-#endif
}
static CPUWriteMemoryFunc * const PPC_intack_write[] = {
@@ -210,9 +202,6 @@ static void PPC_XCSR_writeb (void *opaque,
static void PPC_XCSR_writew (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap16(value);
-#endif
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
value);
}
@@ -220,9 +209,6 @@ static void PPC_XCSR_writew (void *opaque,
static void PPC_XCSR_writel (void *opaque,
target_phys_addr_t addr, uint32_t value)
{
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap32(value);
-#endif
printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", __func__, addr,
value);
}
@@ -243,9 +229,6 @@ static uint32_t PPC_XCSR_readw (void *opaque,
target_phys_addr_t addr)
printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,
retval);
-#ifdef TARGET_WORDS_BIGENDIAN
- retval = bswap16(retval);
-#endif
return retval;
}
@@ -256,9 +239,6 @@ static uint32_t PPC_XCSR_readl (void *opaque,
target_phys_addr_t addr)
printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,
retval);
-#ifdef TARGET_WORDS_BIGENDIAN
- retval = bswap32(retval);
-#endif
return retval;
}
@@ -484,9 +464,6 @@ static void PPC_prep_io_writew (void *opaque,
target_phys_addr_t addr,
sysctrl_t *sysctrl = opaque;
addr = prep_IO_address(sysctrl, addr);
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap16(value);
-#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
cpu_outw(addr, value);
}
@@ -498,9 +475,6 @@ static uint32_t PPC_prep_io_readw (void *opaque,
target_phys_addr_t addr)
addr = prep_IO_address(sysctrl, addr);
ret = cpu_inw(addr);
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = bswap16(ret);
-#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " <= 0x%08" PRIx32 "\n", addr, ret);
return ret;
@@ -512,9 +486,6 @@ static void PPC_prep_io_writel (void *opaque,
target_phys_addr_t addr,
sysctrl_t *sysctrl = opaque;
addr = prep_IO_address(sysctrl, addr);
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap32(value);
-#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
cpu_outl(addr, value);
}
@@ -526,9 +497,6 @@ static uint32_t PPC_prep_io_readl (void *opaque,
target_phys_addr_t addr)
addr = prep_IO_address(sysctrl, addr);
ret = cpu_inl(addr);
-#ifdef TARGET_WORDS_BIGENDIAN
- ret = bswap32(ret);
-#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " <= 0x%08" PRIx32 "\n", addr, ret);
return ret;
@@ -691,7 +659,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
/* Register 8 MB of ISA IO space (needed for non-contiguous map) */
PPC_io_memory = cpu_register_io_memory(PPC_prep_io_read,
PPC_prep_io_write, sysctrl,
- DEVICE_NATIVE_ENDIAN);
+ DEVICE_LITTLE_ENDIAN);
cpu_register_physical_memory(0x80000000, 0x00800000, PPC_io_memory);
/* init basic PC hardware */
@@ -757,12 +725,12 @@ static void ppc_prep_init (ram_addr_t ram_size,
/* PCI intack location */
PPC_io_memory = cpu_register_io_memory(PPC_intack_read,
PPC_intack_write, NULL,
- DEVICE_NATIVE_ENDIAN);
+ DEVICE_LITTLE_ENDIAN);
cpu_register_physical_memory(0xBFFFFFF0, 0x4, PPC_io_memory);
/* PowerPC control and status register group */
#if 0
PPC_io_memory = cpu_register_io_memory(PPC_XCSR_read, PPC_XCSR_write,
- NULL, DEVICE_NATIVE_ENDIAN);
+ NULL, DEVICE_LITTLE_ENDIAN);
cpu_register_physical_memory(0xFEFF0000, 0x1000, PPC_io_memory);
#endif
--
1.6.0.2
- [Qemu-devel] [PATCH 00/15] [PATCH] MMIO endianness cleanup v1, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 15/15] usb_ohci: Always use little endian, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 14/15] isa_mmio: Always use little endian, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 11/15] openpic: Replace explicit byte swap with endian hints, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 13/15] heathrow_pic: Declare as little endian, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 10/15] ppc4xx_pci: Declare as little endian, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 08/15] prep: Declare as little endian,
Alexander Graf <=
- [Qemu-devel] [PATCH 01/15] exec: introduce endianness swapped mmio, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 12/15] rtl8139: Declare as little endian, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 03/15] Make simple io mem handler endian aware, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 07/15] e1000: Make little endian, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 02/15] Add endianness as io mem parameter, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 05/15] pci-host: Delegate bswap to mmio layer, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 09/15] versatile_pci: Declare as little endian, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 06/15] uninorth: Get rid of bswap, Alexander Graf, 2010/11/30
- [Qemu-devel] [PATCH 04/15] dbdma: Make little endian, Alexander Graf, 2010/11/30