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[Qemu-devel] Re: [PATCH] pci: make command SERR bit writable
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] Re: [PATCH] pci: make command SERR bit writable |
Date: |
Thu, 2 Dec 2010 21:32:12 +0200 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Fri, Nov 26, 2010 at 09:01:41PM +0900, Isaku Yamahata wrote:
> pcie aer wants SERR bit to be writable.
> So make it writable. For compatibility, introduce compat global property
> command_serr_enable and don't make it writable when pre 0.14 pc machine.
>
> Signed-off-by: Isaku Yamahata <address@hidden>
Applied on my branch, after fixing a typo
and some conflicts, but I dont see
b1d6dd8ce83e1430b7b0e98c898499a966464227 upstream.
> ---
> This patch depends on b1d6dd8ce83e1430b7b0e98c898499a966464227
> which is in upstream, but it isn't in pci branch.
> ---
> hw/pc_piix.c | 20 ++++++++++++++++++++
> hw/pci.c | 5 +++++
> hw/pci.h | 4 ++++
> 3 files changed, 29 insertions(+), 0 deletions(-)
>
> diff --git a/hw/pc_piix.c b/hw/pc_piix.c
> index e17e878..2994476 100644
> --- a/hw/pc_piix.c
> +++ b/hw/pc_piix.c
> @@ -225,6 +225,14 @@ static QEMUMachine pc_machine_v0_13 = {
> .desc = "Standard PC",
> .init = pc_init_pci,
> .max_cpus = 255,
> + .compat_props = (GlobalProperty[]) {
> + {
> + .driver = "PCI",
> + .property = "command_serr_enable",
> + .value = "off",
> + },
> + { /* end of list */ }
> + }
> };
>
> static QEMUMachine pc_machine_v0_12 = {
> @@ -241,6 +249,10 @@ static QEMUMachine pc_machine_v0_12 = {
> .driver = "virtio-serial-pci",
> .property = "vectors",
> .value = stringify(0),
> + },{
> + .driver = "PCI",
> + .property = "command_serr_enable",
> + .value = "off",
> },
> { /* end of list */ }
> }
> @@ -276,6 +288,10 @@ static QEMUMachine pc_machine_v0_11 = {
> .driver = "PCI",
> .property = "rombar",
> .value = stringify(0),
> + },{
> + .driver = "PCI",
> + .property = "command_serr_enable",
> + .value = "off",
> },
> { /* end of list */ }
> }
> @@ -323,6 +339,10 @@ static QEMUMachine pc_machine_v0_10 = {
> .driver = "PCI",
> .property = "rombar",
> .value = stringify(0),
> + },{
> + .driver = "PCI",
> + .property = "command_serr_enable",
> + .value = "off",
> },
> { /* end of list */ }
> },
> diff --git a/hw/pci.c b/hw/pci.c
> index d02f980..6b7e63c 100644
> --- a/hw/pci.c
> +++ b/hw/pci.c
> @@ -57,6 +57,8 @@ struct BusInfo pci_bus_info = {
> DEFINE_PROP_UINT32("rombar", PCIDevice, rom_bar, 1),
> DEFINE_PROP_BIT("multifunction", PCIDevice, cap_present,
> QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false),
> + DEFINE_PROP_BIT("command_serr_enable", PCIDevice, cap_present,
> + QEMU_PCI_CAP_SERR_BITNR, true),
> DEFINE_PROP_END_OF_LIST()
> }
> };
> @@ -568,6 +570,9 @@ static void pci_init_wmask(PCIDevice *dev)
> pci_set_word(dev->wmask + PCI_COMMAND,
> PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
> PCI_COMMAND_INTX_DISABLE);
> + if (dev->cap_present & QEMU_PCI_CAP_SERR) {
> + pci_word_test_and_set_mask(dev->wmask + PCI_COMMAND,
> PCI_COMMAND_SERR);
> + }
>
> memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff,
> config_size - PCI_CONFIG_HEADER_SIZE);
> diff --git a/hw/pci.h b/hw/pci.h
> index 89f7b76..e20ac36 100644
> --- a/hw/pci.h
> +++ b/hw/pci.h
> @@ -118,6 +118,10 @@ enum {
> /* multifunction capable device */
> #define QEMU_PCI_CAP_MULTIFUNCTION_BITNR 3
> QEMU_PCI_CAP_MULTIFUNCTION = (1 << QEMU_PCI_CAP_MULTIFUNCTION_BITNR),
> +
> + /* enable comman register SERR bit */
> +#define QEMU_PCI_CAP_SERR_BITNR 4
> + QEMU_PCI_CAP_SERR = (1 << QEMU_PCI_CAP_SERR_BITNR),
> };
>
> struct PCIDevice {
> --
> 1.7.1.1
- [Qemu-devel] Re: [PATCH] pci: make command SERR bit writable,
Michael S. Tsirkin <=