[Qemu-devel] Re: [patch 2/2] acpi_piix4: expose no_hotplug attribute via i/o port

[Michael S. Tsirkin]

On Mon, Jan 10, 2011 at 04:55:03PM -0200, Marcelo Tosatti wrote:
> Expose no_hotplug attribute via I/O port, so ACPI BIOS can indicate
> removability status to guest OS.
> 
> An updated seabios is required to make use of this feature (seabios.git
> commit ID 3c241edf3d7ef29c21).
> 
> Signed-off-by: Marcelo Tosatti <address@hidden>
> Tested-by: Gleb Natapov <address@hidden>
> 
> Index: qemu/hw/acpi_piix4.c
> ===================================================================
> --- qemu.orig/hw/acpi_piix4.c
> +++ qemu/hw/acpi_piix4.c
> @@ -37,6 +37,7 @@
>  #define GPE_BASE 0xafe0
>  #define PCI_BASE 0xae00
>  #define PCI_EJ_BASE 0xae08
> +#define PCI_RMV_BASE 0xae0c
>  
>  #define PIIX4_PCI_HOTPLUG_STATUS 2
>  
> @@ -73,6 +74,7 @@ typedef struct PIIX4PMState {
>      /* for pci hotplug */
>      struct gpe_regs gpe;
>      struct pci_status pci0_status;
> +    uint32_t pci0_hotplug_enable;
>  } PIIX4PMState;
>  
>  static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s);
> @@ -322,6 +324,25 @@ static const VMStateDescription vmstate_
>      }
>  };
>  
> +static void piix4_update_hotplug(PIIX4PMState *s)
> +{
> +    PCIDevice *dev = &s->dev;
> +    BusState *bus = qdev_get_parent_bus(&dev->qdev);
> +    DeviceState *qdev, *next;
> +
> +    s->pci0_hotplug_enable = 0;
> +
> +    QLIST_FOREACH_SAFE(qdev, &bus->children, sibling, next) {
> +        PCIDeviceInfo *info = container_of(qdev->info, PCIDeviceInfo, qdev);
> +        PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, qdev);
> +        int slot = PCI_SLOT(pdev->devfn);
> +
> +        if (!info->no_hotplug) {
> +            s->pci0_hotplug_enable |= (1 << slot);
> +        }
> +    }
> +}
> +

So a slot starts as non-removable and becomes removable when you add a
hotpluggable device?  Isn't this a bit strange?
I would say all slots should be removable unless there's a
non hotpluggable device there ...

>  static void piix4_reset(void *opaque)
>  {
>      PIIX4PMState *s = opaque;
> @@ -336,6 +357,7 @@ static void piix4_reset(void *opaque)
>          /* Mark SMM as already inited (until KVM supports SMM). */
>          pci_conf[0x5B] = 0x02;
>      }
> +    piix4_update_hotplug(s);
>  }
>  
>  static void piix4_powerdown(void *opaque, int irq, int power_failing)
> @@ -576,6 +598,18 @@ static void pciej_write(void *opaque, ui
>      PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val);
>  }
>  
> +static uint32_t pcirmv_read(void *opaque, uint32_t addr)
> +{
> +    PIIX4PMState *s = opaque;
> +
> +    return s->pci0_hotplug_enable;
> +}
> +
> +static void pcirmv_write(void *opaque, uint32_t addr, uint32_t val)
> +{
> +    return;
> +}
> +
>  static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev,
>                                  PCIHotplugState state);
>  
> @@ -592,6 +626,9 @@ static void piix4_acpi_system_hot_add_in
>      register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus);
>      register_ioport_read(PCI_EJ_BASE, 4, 4,  pciej_read, bus);
>  
> +    register_ioport_write(PCI_RMV_BASE, 4, 4, pcirmv_write, s);
> +    register_ioport_read(PCI_RMV_BASE, 4, 4,  pcirmv_read, s);
> +
>      pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);
>  }
>  
>