Re: [Qemu-devel] [PATCH 2/4] target-arm: Fix implementation of VRSQRTS

[Aurelien Jarno]

On Fri, Jan 07, 2011 at 09:26:25AM +0000, Peter Maydell wrote:
> The implementation of the ARM VRSQRTS instruction (which calculates
> (3 - op1 * op2) / 2) was missing the division operation. It also
> did not handle the special cases of (0,inf) and (inf,0).
> 
> Signed-off-by: Peter Maydell <address@hidden>
> ---
>  target-arm/helper.c |   10 +++++++++-
>  1 files changed, 9 insertions(+), 1 deletions(-)

Reviewed-by: Aurelien Jarno <address@hidden>

> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 705b99f..ac47de0 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -2612,8 +2612,16 @@ float32 HELPER(recps_f32)(float32 a, float32 b, 
> CPUState *env)
>  float32 HELPER(rsqrts_f32)(float32 a, float32 b, CPUState *env)
>  {
>      float_status *s = &env->vfp.fp_status;
> +    float32 two = int32_to_float32(2, s);
>      float32 three = int32_to_float32(3, s);
> -    return float32_sub(three, float32_mul(a, b, s), s);
> +    float32 product;
> +    if ((float32_is_infinity(a) && float32_is_zero_or_denormal(b)) ||
> +        (float32_is_infinity(b) && float32_is_zero_or_denormal(a))) {
> +        product = float32_zero;
> +    } else {
> +        product = float32_mul(a, b, s);
> +    }
> +    return float32_div(float32_sub(three, product, s), two, s);
>  }
>  
>  /* NEON helpers.  */
> -- 
> 1.6.3.3
> 
> 
> 

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net