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[Qemu-devel] [PATCH v2 1/9] target-sh4: switch sh4 to softfloat
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH v2 1/9] target-sh4: switch sh4 to softfloat |
Date: |
Wed, 12 Jan 2011 12:05:04 +0100 |
We need to be able to catch exceptions correctly and thus enable softfloat
on SH4.
As all machines except i386 and x86_64 are using softfloat, make it the
default and change the case to detect i386 and x86_64. Note that CRIS
doesn't have an FPU, so it can be configured with both softfloat-native
and softfloat.
Signed-off-by: Aurelien Jarno <address@hidden>
---
configure | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index 438219b..473b8e9 100755
--- a/configure
+++ b/configure
@@ -3069,11 +3069,11 @@ if test ! -z "$gdb_xml_files" ; then
fi
case "$target_arch2" in
-
alpha|arm|armeb|m68k|microblaze|mips|mipsel|mipsn32|mipsn32el|mips64|mips64el|ppc|ppc64|ppc64abi32|ppcemb|s390x|sparc|sparc64|sparc32plus)
- echo "CONFIG_SOFTFLOAT=y" >> $config_target_mak
+ i386|x86_64)
+ echo "CONFIG_NOSOFTFLOAT=y" >> $config_target_mak
;;
*)
- echo "CONFIG_NOSOFTFLOAT=y" >> $config_target_mak
+ echo "CONFIG_SOFTFLOAT=y" >> $config_target_mak
;;
esac
--
1.7.2.3
- [Qemu-devel] target-sh4: improve FPU emulation, Aurelien Jarno, 2011/01/11
- [Qemu-devel] [PATCH 5/9] target-sh4: define FPSCR constants, Aurelien Jarno, 2011/01/11
- [Qemu-devel] [PATCH 9/9] target-sh4: add ftrv instruction, Aurelien Jarno, 2011/01/11
- [Qemu-devel] [PATCH 8/9] target-sh4: add fipr instruction, Aurelien Jarno, 2011/01/11
- [Qemu-devel] [PATCH 7/9] target-sh4: implement FPU exceptions, Aurelien Jarno, 2011/01/11
- [Qemu-devel] [PATCH 6/9] target-sh4: implement flush-to-zero, Aurelien Jarno, 2011/01/11
- [Qemu-devel] [PATCH 3/9] softfloat: fix default-NaN mode, Aurelien Jarno, 2011/01/11
- [Qemu-devel] [PATCH 2/9] softfloat: SH4 has the sNaN bit set, Aurelien Jarno, 2011/01/11