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[Qemu-devel] Re: [PATCH] pci: w1cmask[PCI_BRIDGE_CONTROL] initialized in
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] Re: [PATCH] pci: w1cmask[PCI_BRIDGE_CONTROL] initialized incorrectly |
Date: |
Wed, 26 Jan 2011 15:57:15 +0200 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Wed, Jan 26, 2011 at 10:53:42PM +0900, Isaku Yamahata wrote:
> On Wed, Jan 26, 2011 at 03:46:01PM +0200, Michael S. Tsirkin wrote:
> > On Wed, Jan 26, 2011 at 10:17:48PM +0900, Isaku Yamahata wrote:
> > > The bit should be writable, not w1c.
> > >
> > > 3.2.5.18 bridge control register
> > > bit 11 Discard Timer SERR# Enable
> > >
> > > When set to 1, this bit enables the bridge to assert SERR# on
> > > the primary interface when either the Primary Discard Timer or
> > > Secondary Discard Timer expires and a Delayed Transaction is
> > > discarded from a queue in the bridge. The default state of this
> > > bit must be 0 after reset.
> > > 0 - do not assert SERR# on the primary interface as
> > > a result of the expiration of either the Primary
> > > Discard Timer or Secondary Discard Timer
> > > 1 - assert SERR# on the primary interface if either
> > > the Primary Discard Timer or Secondary Discard
> > > Timer expires and a Delayed Transaction
> >
> > Yes but
> > #define PCI_BRIDGE_CTL_DISCARD_STATUS 0x400 /* Discard timer status */
> >
> > So this is bit 10?
>
> Oh, sorry. So wmask should be chenged.
Yes. does the below work?
commit 24ebb78e6ec19b39cd138d493a2859122110f9cb
Author: Michael S. Tsirkin <address@hidden>
Date: Wed Jan 26 15:55:07 2011 +0200
pci: bridge control fixup
PCI_BRIDGE_CTL_DISCARD_STATUS (bit 10 in bridge control register)
is W1C so we should not make it writeable, otherwise the assert(!(wmask
& w1cmask)) in pci_default_write_config() is hit
Signed-off-by: Michael S. Tsirkin <address@hidden>
Reported-by: Isaku Yamahata <address@hidden>
diff --git a/hw/pci.c b/hw/pci.c
index 044c4bd..712280a 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -641,7 +641,6 @@ static void pci_init_wmask_bridge(PCIDevice *d)
PCI_BRIDGE_CTL_FAST_BACK |
PCI_BRIDGE_CTL_DISCARD |
PCI_BRIDGE_CTL_SEC_DISCARD |
- PCI_BRIDGE_CTL_DISCARD_STATUS |
PCI_BRIDGE_CTL_DISCARD_SERR);
/* Below does not do anything as we never set this bit, put here for
* completeness. */