[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 7/8] implement vsli.64, vsri.64
From: |
christophe.lyon |
Subject: |
[Qemu-devel] [PATCH 7/8] implement vsli.64, vsri.64 |
Date: |
Fri, 28 Jan 2011 16:51:05 +0100 |
From: Christophe Lyon <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Signed-off-by: Christophe Lyon <address@hidden>
---
target-arm/translate.c | 11 ++++++++++-
1 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 3b14b8f..984df08 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -4711,7 +4711,16 @@ static int disas_neon_data_insn(CPUState * env,
DisasContext *s, uint32_t insn)
tcg_gen_add_i64(cpu_V0, cpu_V0, cpu_V1);
} else if (op == 4 || (op == 5 && u)) {
/* Insert */
- cpu_abort(env, "VS[LR]I.64 not implemented");
+ neon_load_reg64(cpu_V1, rd + pass);
+ uint64_t mask;
+ if (op == 4) {
+ mask = 0xffffffffffffffffull >> -shift;
+ } else {
+ mask = 0xffffffffffffffffull << shift;
+ }
+ tcg_gen_andi_i64(cpu_V0, cpu_V0, mask);
+ tcg_gen_andi_i64(cpu_V1, cpu_V1, ~mask);
+ tcg_gen_or_i64(cpu_V0, cpu_V0, cpu_V1);
}
neon_store_reg64(cpu_V0, rd + pass);
} else { /* size < 3 */
--
1.7.2.3
- Re: [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA., (continued)
- Re: [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA., Aurelien Jarno, 2011/01/31
- Re: [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA., Alon Levy, 2011/01/31
- Re: [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA., Christophe Lyon, 2011/01/31
- Re: [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA., Aurelien Jarno, 2011/01/31
- Re: [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA., Peter Maydell, 2011/01/31
- Re: [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA., Christophe Lyon, 2011/01/31
[Qemu-devel] [PATCH 4/8] target-arm: fiddle decoding of 64 bit shift by imm and narrow, christophe.lyon, 2011/01/28
[Qemu-devel] [PATCH 3/8] target-arm: VQRSHRN related changes, christophe.lyon, 2011/01/28
[Qemu-devel] [PATCH 5/8] target-arm: fix neon vqrshl instruction, christophe.lyon, 2011/01/28
[Qemu-devel] [PATCH 6/8] target-arm: Fix Neon VQ(R)SHRN instructions., christophe.lyon, 2011/01/28
[Qemu-devel] [PATCH 7/8] implement vsli.64, vsri.64,
christophe.lyon <=
[Qemu-devel] [PATCH 8/8] target-arm: Fix VQRSHL Neon instructions (signed/unsigned 64 bits and signed 32 bits variants)., christophe.lyon, 2011/01/28
[Qemu-devel] [PATCH 2/8] target-arm: Create and use neon_unarrow_sat* helpers, christophe.lyon, 2011/01/28
Re: [Qemu-devel] [PATCH 0/8] target-arm: Fix Neon instructions VQMOVUN VQRSHL VQRSHRN VQRSHRUN VQSHRN VQSHRUN VSLI VSRI, Peter Maydell, 2011/01/28