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[Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} typ
|
From: |
Andreas Färber |
|
Subject: |
[Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t |
|
Date: |
Mon, 7 Mar 2011 01:34:06 +0100 |
They are defined with the same semantics as the POSIX types,
so prefer those for consistency. Suggested by Peter Maydell.
v5:
* Rebased. Convert new uses of bits*.
v4:
* Rebased.
v3:
* Initial.
Cc: Peter Maydell <address@hidden>
Cc: Aurelien Jarno <address@hidden>
Signed-off-by: Andreas Färber <address@hidden>
---
fpu/softfloat-macros.h | 182 +++++++-------
fpu/softfloat-native.c | 6 +-
fpu/softfloat-specialize.h | 62 +++---
fpu/softfloat.c | 584 ++++++++++++++++++++++----------------------
fpu/softfloat.h | 15 --
5 files changed, 417 insertions(+), 432 deletions(-)
diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h
index 54c0bad..3128e60 100644
--- a/fpu/softfloat-macros.h
+++ b/fpu/softfloat-macros.h
@@ -44,9 +44,9 @@ these four paragraphs for those parts of this code that are
retained.
| The result is stored in the location pointed to by `zPtr'.
*----------------------------------------------------------------------------*/
-INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr )
+INLINE void shift32RightJamming( uint32_t a, int16 count, uint32_t *zPtr )
{
- bits32 z;
+ uint32_t z;
if ( count == 0 ) {
z = a;
@@ -70,9 +70,9 @@ INLINE void shift32RightJamming( bits32 a, int16 count,
bits32 *zPtr )
| The result is stored in the location pointed to by `zPtr'.
*----------------------------------------------------------------------------*/
-INLINE void shift64RightJamming( bits64 a, int16 count, bits64 *zPtr )
+INLINE void shift64RightJamming( uint64_t a, int16 count, uint64_t *zPtr )
{
- bits64 z;
+ uint64_t z;
if ( count == 0 ) {
z = a;
@@ -106,9 +106,9 @@ INLINE void shift64RightJamming( bits64 a, int16 count,
bits64 *zPtr )
INLINE void
shift64ExtraRightJamming(
- bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
+ uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
{
- bits64 z0, z1;
+ uint64_t z0, z1;
int8 negCount = ( - count ) & 63;
if ( count == 0 ) {
@@ -143,9 +143,9 @@ INLINE void
INLINE void
shift128Right(
- bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
+ uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
{
- bits64 z0, z1;
+ uint64_t z0, z1;
int8 negCount = ( - count ) & 63;
if ( count == 0 ) {
@@ -178,9 +178,9 @@ INLINE void
INLINE void
shift128RightJamming(
- bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
+ uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
{
- bits64 z0, z1;
+ uint64_t z0, z1;
int8 negCount = ( - count ) & 63;
if ( count == 0 ) {
@@ -229,16 +229,16 @@ INLINE void
INLINE void
shift128ExtraRightJamming(
- bits64 a0,
- bits64 a1,
- bits64 a2,
+ uint64_t a0,
+ uint64_t a1,
+ uint64_t a2,
int16 count,
- bits64 *z0Ptr,
- bits64 *z1Ptr,
- bits64 *z2Ptr
+ uint64_t *z0Ptr,
+ uint64_t *z1Ptr,
+ uint64_t *z2Ptr
)
{
- bits64 z0, z1, z2;
+ uint64_t z0, z1, z2;
int8 negCount = ( - count ) & 63;
if ( count == 0 ) {
@@ -287,7 +287,7 @@ INLINE void
INLINE void
shortShift128Left(
- bits64 a0, bits64 a1, int16 count, bits64 *z0Ptr, bits64 *z1Ptr )
+ uint64_t a0, uint64_t a1, int16 count, uint64_t *z0Ptr, uint64_t *z1Ptr )
{
*z1Ptr = a1<<count;
@@ -306,16 +306,16 @@ INLINE void
INLINE void
shortShift192Left(
- bits64 a0,
- bits64 a1,
- bits64 a2,
+ uint64_t a0,
+ uint64_t a1,
+ uint64_t a2,
int16 count,
- bits64 *z0Ptr,
- bits64 *z1Ptr,
- bits64 *z2Ptr
+ uint64_t *z0Ptr,
+ uint64_t *z1Ptr,
+ uint64_t *z2Ptr
)
{
- bits64 z0, z1, z2;
+ uint64_t z0, z1, z2;
int8 negCount;
z2 = a2<<count;
@@ -341,9 +341,9 @@ INLINE void
INLINE void
add128(
- bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
+ uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr,
uint64_t *z1Ptr )
{
- bits64 z1;
+ uint64_t z1;
z1 = a1 + b1;
*z1Ptr = z1;
@@ -361,18 +361,18 @@ INLINE void
INLINE void
add192(
- bits64 a0,
- bits64 a1,
- bits64 a2,
- bits64 b0,
- bits64 b1,
- bits64 b2,
- bits64 *z0Ptr,
- bits64 *z1Ptr,
- bits64 *z2Ptr
+ uint64_t a0,
+ uint64_t a1,
+ uint64_t a2,
+ uint64_t b0,
+ uint64_t b1,
+ uint64_t b2,
+ uint64_t *z0Ptr,
+ uint64_t *z1Ptr,
+ uint64_t *z2Ptr
)
{
- bits64 z0, z1, z2;
+ uint64_t z0, z1, z2;
int8 carry0, carry1;
z2 = a2 + b2;
@@ -399,7 +399,7 @@ INLINE void
INLINE void
sub128(
- bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
+ uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1, uint64_t *z0Ptr,
uint64_t *z1Ptr )
{
*z1Ptr = a1 - b1;
@@ -417,18 +417,18 @@ INLINE void
INLINE void
sub192(
- bits64 a0,
- bits64 a1,
- bits64 a2,
- bits64 b0,
- bits64 b1,
- bits64 b2,
- bits64 *z0Ptr,
- bits64 *z1Ptr,
- bits64 *z2Ptr
+ uint64_t a0,
+ uint64_t a1,
+ uint64_t a2,
+ uint64_t b0,
+ uint64_t b1,
+ uint64_t b2,
+ uint64_t *z0Ptr,
+ uint64_t *z1Ptr,
+ uint64_t *z2Ptr
)
{
- bits64 z0, z1, z2;
+ uint64_t z0, z1, z2;
int8 borrow0, borrow1;
z2 = a2 - b2;
@@ -451,21 +451,21 @@ INLINE void
| `z0Ptr' and `z1Ptr'.
*----------------------------------------------------------------------------*/
-INLINE void mul64To128( bits64 a, bits64 b, bits64 *z0Ptr, bits64 *z1Ptr )
+INLINE void mul64To128( uint64_t a, uint64_t b, uint64_t *z0Ptr, uint64_t
*z1Ptr )
{
- bits32 aHigh, aLow, bHigh, bLow;
- bits64 z0, zMiddleA, zMiddleB, z1;
+ uint32_t aHigh, aLow, bHigh, bLow;
+ uint64_t z0, zMiddleA, zMiddleB, z1;
aLow = a;
aHigh = a>>32;
bLow = b;
bHigh = b>>32;
- z1 = ( (bits64) aLow ) * bLow;
- zMiddleA = ( (bits64) aLow ) * bHigh;
- zMiddleB = ( (bits64) aHigh ) * bLow;
- z0 = ( (bits64) aHigh ) * bHigh;
+ z1 = ( (uint64_t) aLow ) * bLow;
+ zMiddleA = ( (uint64_t) aLow ) * bHigh;
+ zMiddleB = ( (uint64_t) aHigh ) * bLow;
+ z0 = ( (uint64_t) aHigh ) * bHigh;
zMiddleA += zMiddleB;
- z0 += ( ( (bits64) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 );
+ z0 += ( ( (uint64_t) ( zMiddleA < zMiddleB ) )<<32 ) + ( zMiddleA>>32 );
zMiddleA <<= 32;
z1 += zMiddleA;
z0 += ( z1 < zMiddleA );
@@ -483,15 +483,15 @@ INLINE void mul64To128( bits64 a, bits64 b, bits64
*z0Ptr, bits64 *z1Ptr )
INLINE void
mul128By64To192(
- bits64 a0,
- bits64 a1,
- bits64 b,
- bits64 *z0Ptr,
- bits64 *z1Ptr,
- bits64 *z2Ptr
+ uint64_t a0,
+ uint64_t a1,
+ uint64_t b,
+ uint64_t *z0Ptr,
+ uint64_t *z1Ptr,
+ uint64_t *z2Ptr
)
{
- bits64 z0, z1, z2, more1;
+ uint64_t z0, z1, z2, more1;
mul64To128( a1, b, &z1, &z2 );
mul64To128( a0, b, &z0, &more1 );
@@ -511,18 +511,18 @@ INLINE void
INLINE void
mul128To256(
- bits64 a0,
- bits64 a1,
- bits64 b0,
- bits64 b1,
- bits64 *z0Ptr,
- bits64 *z1Ptr,
- bits64 *z2Ptr,
- bits64 *z3Ptr
+ uint64_t a0,
+ uint64_t a1,
+ uint64_t b0,
+ uint64_t b1,
+ uint64_t *z0Ptr,
+ uint64_t *z1Ptr,
+ uint64_t *z2Ptr,
+ uint64_t *z3Ptr
)
{
- bits64 z0, z1, z2, z3;
- bits64 more1, more2;
+ uint64_t z0, z1, z2, z3;
+ uint64_t more1, more2;
mul64To128( a1, b1, &z2, &z3 );
mul64To128( a1, b0, &z1, &more2 );
@@ -548,18 +548,18 @@ INLINE void
| unsigned integer is returned.
*----------------------------------------------------------------------------*/
-static bits64 estimateDiv128To64( bits64 a0, bits64 a1, bits64 b )
+static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b )
{
- bits64 b0, b1;
- bits64 rem0, rem1, term0, term1;
- bits64 z;
+ uint64_t b0, b1;
+ uint64_t rem0, rem1, term0, term1;
+ uint64_t z;
if ( b <= a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF );
b0 = b>>32;
z = ( b0<<32 <= a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<32;
mul64To128( b, z, &term0, &term1 );
sub128( a0, a1, term0, term1, &rem0, &rem1 );
- while ( ( (sbits64) rem0 ) < 0 ) {
+ while ( ( (int64_t) rem0 ) < 0 ) {
z -= LIT64( 0x100000000 );
b1 = b<<32;
add128( rem0, rem1, b0, b1, &rem0, &rem1 );
@@ -580,18 +580,18 @@ static bits64 estimateDiv128To64( bits64 a0, bits64 a1,
bits64 b )
| value.
*----------------------------------------------------------------------------*/
-static bits32 estimateSqrt32( int16 aExp, bits32 a )
+static uint32_t estimateSqrt32( int16 aExp, uint32_t a )
{
- static const bits16 sqrtOddAdjustments[] = {
+ static const uint16_t sqrtOddAdjustments[] = {
0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0,
0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67
};
- static const bits16 sqrtEvenAdjustments[] = {
+ static const uint16_t sqrtEvenAdjustments[] = {
0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E,
0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002
};
int8 index;
- bits32 z;
+ uint32_t z;
index = ( a>>27 ) & 15;
if ( aExp & 1 ) {
@@ -603,9 +603,9 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a )
z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ (int)index ];
z = a / z + z;
z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 );
- if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 );
+ if ( z <= a ) return (uint32_t) ( ( (int32_t) a )>>1 );
}
- return ( (bits32) ( ( ( (bits64) a )<<31 ) / z ) ) + ( z>>1 );
+ return ( (uint32_t) ( ( ( (uint64_t) a )<<31 ) / z ) ) + ( z>>1 );
}
@@ -614,7 +614,7 @@ static bits32 estimateSqrt32( int16 aExp, bits32 a )
| `a'. If `a' is zero, 32 is returned.
*----------------------------------------------------------------------------*/
-static int8 countLeadingZeros32( bits32 a )
+static int8 countLeadingZeros32( uint32_t a )
{
static const int8 countLeadingZerosHigh[] = {
8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
@@ -655,12 +655,12 @@ static int8 countLeadingZeros32( bits32 a )
| `a'. If `a' is zero, 64 is returned.
*----------------------------------------------------------------------------*/
-static int8 countLeadingZeros64( bits64 a )
+static int8 countLeadingZeros64( uint64_t a )
{
int8 shiftCount;
shiftCount = 0;
- if ( a < ( (bits64) 1 )<<32 ) {
+ if ( a < ( (uint64_t) 1 )<<32 ) {
shiftCount += 32;
}
else {
@@ -677,7 +677,7 @@ static int8 countLeadingZeros64( bits64 a )
| Otherwise, returns 0.
*----------------------------------------------------------------------------*/
-INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
+INLINE flag eq128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
{
return ( a0 == b0 ) && ( a1 == b1 );
@@ -690,7 +690,7 @@ INLINE flag eq128( bits64 a0, bits64 a1, bits64 b0, bits64
b1 )
| Otherwise, returns 0.
*----------------------------------------------------------------------------*/
-INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
+INLINE flag le128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
{
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) );
@@ -703,7 +703,7 @@ INLINE flag le128( bits64 a0, bits64 a1, bits64 b0, bits64
b1 )
| returns 0.
*----------------------------------------------------------------------------*/
-INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
+INLINE flag lt128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
{
return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) );
@@ -716,7 +716,7 @@ INLINE flag lt128( bits64 a0, bits64 a1, bits64 b0, bits64
b1 )
| Otherwise, returns 0.
*----------------------------------------------------------------------------*/
-INLINE flag ne128( bits64 a0, bits64 a1, bits64 b0, bits64 b1 )
+INLINE flag ne128( uint64_t a0, uint64_t a1, uint64_t b0, uint64_t b1 )
{
return ( a0 != b0 ) || ( a1 != b1 );
diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c
index 008bb53..50355a4 100644
--- a/fpu/softfloat-native.c
+++ b/fpu/softfloat-native.c
@@ -418,7 +418,7 @@ int float64_is_quiet_nan( float64 a1 )
u.f = a1;
a = u.i;
- return ( LIT64( 0xFFF0000000000000 ) < (bits64) ( a<<1 ) );
+ return ( LIT64( 0xFFF0000000000000 ) < (uint64_t) ( a<<1 ) );
}
@@ -500,7 +500,7 @@ int floatx80_is_signaling_nan( floatx80 a1)
aLow = u.i.low & ~ LIT64( 0x4000000000000000 );
return
( ( u.i.high & 0x7FFF ) == 0x7FFF )
- && (bits64) ( aLow<<1 )
+ && (uint64_t) ( aLow<<1 )
&& ( u.i.low == aLow );
}
@@ -508,7 +508,7 @@ int floatx80_is_quiet_nan( floatx80 a1 )
{
floatx80u u;
u.f = a1;
- return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (bits64) ( u.i.low<<1 );
+ return ( ( u.i.high & 0x7FFF ) == 0x7FFF ) && (uint64_t) ( u.i.low<<1 );
}
#endif
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 4add93c..4b65de6 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -52,7 +52,7 @@ void float_raise( int8 flags STATUS_PARAM )
*----------------------------------------------------------------------------*/
typedef struct {
flag sign;
- bits64 high, low;
+ uint64_t high, low;
} commonNaNT;
/*----------------------------------------------------------------------------
@@ -120,7 +120,7 @@ static commonNaNT float16ToCommonNaN( float16 a
STATUS_PARAM )
if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid
STATUS_VAR );
z.sign = float16_val(a) >> 15;
z.low = 0;
- z.high = ((bits64) float16_val(a))<<54;
+ z.high = ((uint64_t) float16_val(a))<<54;
return z;
}
@@ -156,7 +156,7 @@ int float32_is_quiet_nan( float32 a_ )
#if SNAN_BIT_IS_ONE
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
#else
- return ( 0xFF800000 <= (bits32) ( a<<1 ) );
+ return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
#endif
}
@@ -169,7 +169,7 @@ int float32_is_signaling_nan( float32 a_ )
{
uint32_t a = float32_val(a_);
#if SNAN_BIT_IS_ONE
- return ( 0xFF800000 <= (bits32) ( a<<1 ) );
+ return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
#else
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
#endif
@@ -190,7 +190,7 @@ float32 float32_maybe_silence_nan( float32 a_ )
# error Rules for silencing a signaling NaN are target-specific
# endif
#else
- bits32 a = float32_val(a_);
+ uint32_t a = float32_val(a_);
a |= (1 << 22);
return make_float32(a);
#endif
@@ -211,7 +211,7 @@ static commonNaNT float32ToCommonNaN( float32 a
STATUS_PARAM )
if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid
STATUS_VAR );
z.sign = float32_val(a)>>31;
z.low = 0;
- z.high = ( (bits64) float32_val(a) )<<41;
+ z.high = ( (uint64_t) float32_val(a) )<<41;
return z;
}
@@ -222,7 +222,7 @@ static commonNaNT float32ToCommonNaN( float32 a
STATUS_PARAM )
static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM)
{
- bits32 mantissa = a.high>>41;
+ uint32_t mantissa = a.high>>41;
if ( STATUS(default_nan_mode) ) {
return float32_default_nan;
@@ -230,7 +230,7 @@ static float32 commonNaNToFloat32( commonNaNT a
STATUS_PARAM)
if ( mantissa )
return make_float32(
- ( ( (bits32) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
+ ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
else
return float32_default_nan;
}
@@ -357,7 +357,7 @@ static float32 propagateFloat32NaN( float32 a, float32 b
STATUS_PARAM)
{
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
flag aIsLargerSignificand;
- bits32 av, bv;
+ uint32_t av, bv;
aIsQuietNaN = float32_is_quiet_nan( a );
aIsSignalingNaN = float32_is_signaling_nan( a );
@@ -371,9 +371,9 @@ static float32 propagateFloat32NaN( float32 a, float32 b
STATUS_PARAM)
if ( STATUS(default_nan_mode) )
return float32_default_nan;
- if ((bits32)(av<<1) < (bits32)(bv<<1)) {
+ if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
aIsLargerSignificand = 0;
- } else if ((bits32)(bv<<1) < (bits32)(av<<1)) {
+ } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
aIsLargerSignificand = 1;
} else {
aIsLargerSignificand = (av < bv) ? 1 : 0;
@@ -394,13 +394,13 @@ static float32 propagateFloat32NaN( float32 a, float32 b
STATUS_PARAM)
int float64_is_quiet_nan( float64 a_ )
{
- bits64 a = float64_val(a_);
+ uint64_t a = float64_val(a_);
#if SNAN_BIT_IS_ONE
return
( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
&& ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
#else
- return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) );
+ return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
#endif
}
@@ -411,9 +411,9 @@ int float64_is_quiet_nan( float64 a_ )
int float64_is_signaling_nan( float64 a_ )
{
- bits64 a = float64_val(a_);
+ uint64_t a = float64_val(a_);
#if SNAN_BIT_IS_ONE
- return ( LIT64( 0xFFF0000000000000 ) <= (bits64) ( a<<1 ) );
+ return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
#else
return
( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
@@ -436,7 +436,7 @@ float64 float64_maybe_silence_nan( float64 a_ )
# error Rules for silencing a signaling NaN are target-specific
# endif
#else
- bits64 a = float64_val(a_);
+ uint64_t a = float64_val(a_);
a |= LIT64( 0x0008000000000000 );
return make_float64(a);
#endif
@@ -468,7 +468,7 @@ static commonNaNT float64ToCommonNaN( float64 a
STATUS_PARAM)
static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM)
{
- bits64 mantissa = a.high>>12;
+ uint64_t mantissa = a.high>>12;
if ( STATUS(default_nan_mode) ) {
return float64_default_nan;
@@ -476,7 +476,7 @@ static float64 commonNaNToFloat64( commonNaNT a
STATUS_PARAM)
if ( mantissa )
return make_float64(
- ( ( (bits64) a.sign )<<63 )
+ ( ( (uint64_t) a.sign )<<63 )
| LIT64( 0x7FF0000000000000 )
| ( a.high>>12 ));
else
@@ -493,7 +493,7 @@ static float64 propagateFloat64NaN( float64 a, float64 b
STATUS_PARAM)
{
flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
flag aIsLargerSignificand;
- bits64 av, bv;
+ uint64_t av, bv;
aIsQuietNaN = float64_is_quiet_nan( a );
aIsSignalingNaN = float64_is_signaling_nan( a );
@@ -507,9 +507,9 @@ static float64 propagateFloat64NaN( float64 a, float64 b
STATUS_PARAM)
if ( STATUS(default_nan_mode) )
return float64_default_nan;
- if ((bits64)(av<<1) < (bits64)(bv<<1)) {
+ if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
aIsLargerSignificand = 0;
- } else if ((bits64)(bv<<1) < (bits64)(av<<1)) {
+ } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
aIsLargerSignificand = 1;
} else {
aIsLargerSignificand = (av < bv) ? 1 : 0;
@@ -534,16 +534,16 @@ static float64 propagateFloat64NaN( float64 a, float64 b
STATUS_PARAM)
int floatx80_is_quiet_nan( floatx80 a )
{
#if SNAN_BIT_IS_ONE
- bits64 aLow;
+ uint64_t aLow;
aLow = a.low & ~ LIT64( 0x4000000000000000 );
return
( ( a.high & 0x7FFF ) == 0x7FFF )
- && (bits64) ( aLow<<1 )
+ && (uint64_t) ( aLow<<1 )
&& ( a.low == aLow );
#else
return ( ( a.high & 0x7FFF ) == 0x7FFF )
- && (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 )));
+ && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
#endif
}
@@ -557,14 +557,14 @@ int floatx80_is_signaling_nan( floatx80 a )
{
#if SNAN_BIT_IS_ONE
return ( ( a.high & 0x7FFF ) == 0x7FFF )
- && (LIT64( 0x8000000000000000 ) <= ((bits64) ( a.low<<1 )));
+ && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
#else
- bits64 aLow;
+ uint64_t aLow;
aLow = a.low & ~ LIT64( 0x4000000000000000 );
return
( ( a.high & 0x7FFF ) == 0x7FFF )
- && (bits64) ( aLow<<1 )
+ && (uint64_t) ( aLow<<1 )
&& ( a.low == aLow );
#endif
}
@@ -628,7 +628,7 @@ static floatx80 commonNaNToFloatx80( commonNaNT a
STATUS_PARAM)
z.low = a.high;
else
z.low = floatx80_default_nan_low;
- z.high = ( ( (bits16) a.sign )<<15 ) | 0x7FFF;
+ z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
return z;
}
@@ -689,7 +689,7 @@ int float128_is_quiet_nan( float128 a )
&& ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
#else
return
- ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
+ ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
#endif
}
@@ -703,7 +703,7 @@ int float128_is_signaling_nan( float128 a )
{
#if SNAN_BIT_IS_ONE
return
- ( LIT64( 0xFFFE000000000000 ) <= (bits64) ( a.high<<1 ) )
+ ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
&& ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
#else
return
@@ -767,7 +767,7 @@ static float128 commonNaNToFloat128( commonNaNT a
STATUS_PARAM)
}
shift128Right( a.high, a.low, 16, &z.high, &z.low );
- z.high |= ( ( (bits64) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
+ z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
return z;
}
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index e800daa..08e4ae0 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -109,7 +109,7 @@ INLINE flag extractFloat16Sign(float16 a)
| positive or negative integer is returned.
*----------------------------------------------------------------------------*/
-static int32 roundAndPackInt32( flag zSign, bits64 absZ STATUS_PARAM)
+static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven;
@@ -140,7 +140,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ
STATUS_PARAM)
if ( zSign ) z = - z;
if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
float_raise( float_flag_invalid STATUS_VAR);
- return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ return zSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
}
if ( roundBits ) STATUS(float_exception_flags) |= float_flag_inexact;
return z;
@@ -159,7 +159,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ
STATUS_PARAM)
| returned.
*----------------------------------------------------------------------------*/
-static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1
STATUS_PARAM)
+static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1
STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven, increment;
@@ -167,7 +167,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0,
bits64 absZ1 STATUS_PA
roundingMode = STATUS(float_rounding_mode);
roundNearestEven = ( roundingMode == float_round_nearest_even );
- increment = ( (sbits64) absZ1 < 0 );
+ increment = ( (int64_t) absZ1 < 0 );
if ( ! roundNearestEven ) {
if ( roundingMode == float_round_to_zero ) {
increment = 0;
@@ -184,7 +184,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0,
bits64 absZ1 STATUS_PA
if ( increment ) {
++absZ0;
if ( absZ0 == 0 ) goto overflow;
- absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven );
+ absZ0 &= ~ ( ( (uint64_t) ( absZ1<<1 ) == 0 ) & roundNearestEven );
}
z = absZ0;
if ( zSign ) z = - z;
@@ -192,7 +192,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0,
bits64 absZ1 STATUS_PA
overflow:
float_raise( float_flag_invalid STATUS_VAR);
return
- zSign ? (sbits64) LIT64( 0x8000000000000000 )
+ zSign ? (int64_t) LIT64( 0x8000000000000000 )
: LIT64( 0x7FFFFFFFFFFFFFFF );
}
if ( absZ1 ) STATUS(float_exception_flags) |= float_flag_inexact;
@@ -204,7 +204,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0,
bits64 absZ1 STATUS_PA
| Returns the fraction bits of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits32 extractFloat32Frac( float32 a )
+INLINE uint32_t extractFloat32Frac( float32 a )
{
return float32_val(a) & 0x007FFFFF;
@@ -256,7 +256,7 @@ static float32 float32_squash_input_denormal(float32 a
STATUS_PARAM)
*----------------------------------------------------------------------------*/
static void
- normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr )
+ normalizeFloat32Subnormal( uint32_t aSig, int16 *zExpPtr, uint32_t *zSigPtr )
{
int8 shiftCount;
@@ -277,11 +277,11 @@ static void
| significand.
*----------------------------------------------------------------------------*/
-INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
+INLINE float32 packFloat32( flag zSign, int16 zExp, uint32_t zSig )
{
return make_float32(
- ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig);
+ ( ( (uint32_t) zSign )<<31 ) + ( ( (uint32_t) zExp )<<23 ) + zSig);
}
@@ -307,7 +307,7 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, bits32
zSig )
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig
STATUS_PARAM)
+static float32 roundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig
STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven;
@@ -332,10 +332,10 @@ static float32 roundAndPackFloat32( flag zSign, int16
zExp, bits32 zSig STATUS_P
}
}
roundBits = zSig & 0x7F;
- if ( 0xFD <= (bits16) zExp ) {
+ if ( 0xFD <= (uint16_t) zExp ) {
if ( ( 0xFD < zExp )
|| ( ( zExp == 0xFD )
- && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )
+ && ( (int32_t) ( zSig + roundIncrement ) < 0 ) )
) {
float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);
return packFloat32( zSign, 0xFF, - ( roundIncrement == 0 ));
@@ -370,7 +370,7 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp,
bits32 zSig STATUS_P
*----------------------------------------------------------------------------*/
static float32
- normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig
STATUS_PARAM)
+ normalizeRoundAndPackFloat32( flag zSign, int16 zExp, uint32_t zSig
STATUS_PARAM)
{
int8 shiftCount;
@@ -383,7 +383,7 @@ static float32
| Returns the fraction bits of the double-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits64 extractFloat64Frac( float64 a )
+INLINE uint64_t extractFloat64Frac( float64 a )
{
return float64_val(a) & LIT64( 0x000FFFFFFFFFFFFF );
@@ -435,7 +435,7 @@ static float64 float64_squash_input_denormal(float64 a
STATUS_PARAM)
*----------------------------------------------------------------------------*/
static void
- normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr )
+ normalizeFloat64Subnormal( uint64_t aSig, int16 *zExpPtr, uint64_t *zSigPtr )
{
int8 shiftCount;
@@ -456,11 +456,11 @@ static void
| significand.
*----------------------------------------------------------------------------*/
-INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )
+INLINE float64 packFloat64( flag zSign, int16 zExp, uint64_t zSig )
{
return make_float64(
- ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig);
+ ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<52 ) + zSig);
}
@@ -486,7 +486,7 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, bits64
zSig )
| Binary Floating-Point Arithmetic.
*----------------------------------------------------------------------------*/
-static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig
STATUS_PARAM)
+static float64 roundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig
STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven;
@@ -511,10 +511,10 @@ static float64 roundAndPackFloat64( flag zSign, int16
zExp, bits64 zSig STATUS_P
}
}
roundBits = zSig & 0x3FF;
- if ( 0x7FD <= (bits16) zExp ) {
+ if ( 0x7FD <= (uint16_t) zExp ) {
if ( ( 0x7FD < zExp )
|| ( ( zExp == 0x7FD )
- && ( (sbits64) ( zSig + roundIncrement ) < 0 ) )
+ && ( (int64_t) ( zSig + roundIncrement ) < 0 ) )
) {
float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);
return packFloat64( zSign, 0x7FF, - ( roundIncrement == 0 ));
@@ -549,7 +549,7 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp,
bits64 zSig STATUS_P
*----------------------------------------------------------------------------*/
static float64
- normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig
STATUS_PARAM)
+ normalizeRoundAndPackFloat64( flag zSign, int16 zExp, uint64_t zSig
STATUS_PARAM)
{
int8 shiftCount;
@@ -565,7 +565,7 @@ static float64
| value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits64 extractFloatx80Frac( floatx80 a )
+INLINE uint64_t extractFloatx80Frac( floatx80 a )
{
return a.low;
@@ -604,7 +604,7 @@ INLINE flag extractFloatx80Sign( floatx80 a )
*----------------------------------------------------------------------------*/
static void
- normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr )
+ normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr )
{
int8 shiftCount;
@@ -619,12 +619,12 @@ static void
| extended double-precision floating-point value, returning the result.
*----------------------------------------------------------------------------*/
-INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )
+INLINE floatx80 packFloatx80( flag zSign, int32 zExp, uint64_t zSig )
{
floatx80 z;
z.low = zSig;
- z.high = ( ( (bits16) zSign )<<15 ) + zExp;
+ z.high = ( ( (uint16_t) zSign )<<15 ) + zExp;
return z;
}
@@ -655,7 +655,7 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp,
bits64 zSig )
static floatx80
roundAndPackFloatx80(
- int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
+ int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t
zSig1
STATUS_PARAM)
{
int8 roundingMode;
@@ -692,7 +692,7 @@ static floatx80
}
}
roundBits = zSig0 & roundMask;
- if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
+ if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
if ( ( 0x7FFE < zExp )
|| ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) )
) {
@@ -710,7 +710,7 @@ static floatx80
if ( isTiny && roundBits ) float_raise( float_flag_underflow
STATUS_VAR);
if ( roundBits ) STATUS(float_exception_flags) |=
float_flag_inexact;
zSig0 += roundIncrement;
- if ( (sbits64) zSig0 < 0 ) zExp = 1;
+ if ( (int64_t) zSig0 < 0 ) zExp = 1;
roundIncrement = roundMask + 1;
if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
roundMask |= roundIncrement;
@@ -733,7 +733,7 @@ static floatx80
if ( zSig0 == 0 ) zExp = 0;
return packFloatx80( zSign, zExp, zSig0 );
precision80:
- increment = ( (sbits64) zSig1 < 0 );
+ increment = ( (int64_t) zSig1 < 0 );
if ( ! roundNearestEven ) {
if ( roundingMode == float_round_to_zero ) {
increment = 0;
@@ -747,7 +747,7 @@ static floatx80
}
}
}
- if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
+ if ( 0x7FFD <= (uint32_t) ( zExp - 1 ) ) {
if ( ( 0x7FFE < zExp )
|| ( ( zExp == 0x7FFE )
&& ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )
@@ -776,7 +776,7 @@ static floatx80
if ( isTiny && zSig1 ) float_raise( float_flag_underflow
STATUS_VAR);
if ( zSig1 ) STATUS(float_exception_flags) |= float_flag_inexact;
if ( roundNearestEven ) {
- increment = ( (sbits64) zSig1 < 0 );
+ increment = ( (int64_t) zSig1 < 0 );
}
else {
if ( zSign ) {
@@ -789,8 +789,8 @@ static floatx80
if ( increment ) {
++zSig0;
zSig0 &=
- ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
- if ( (sbits64) zSig0 < 0 ) zExp = 1;
+ ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
+ if ( (int64_t) zSig0 < 0 ) zExp = 1;
}
return packFloatx80( zSign, zExp, zSig0 );
}
@@ -803,7 +803,7 @@ static floatx80
zSig0 = LIT64( 0x8000000000000000 );
}
else {
- zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
+ zSig0 &= ~ ( ( (uint64_t) ( zSig1<<1 ) == 0 ) & roundNearestEven );
}
}
else {
@@ -824,7 +824,7 @@ static floatx80
static floatx80
normalizeRoundAndPackFloatx80(
- int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
+ int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t
zSig1
STATUS_PARAM)
{
int8 shiftCount;
@@ -851,7 +851,7 @@ static floatx80
| floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits64 extractFloat128Frac1( float128 a )
+INLINE uint64_t extractFloat128Frac1( float128 a )
{
return a.low;
@@ -863,7 +863,7 @@ INLINE bits64 extractFloat128Frac1( float128 a )
| floating-point value `a'.
*----------------------------------------------------------------------------*/
-INLINE bits64 extractFloat128Frac0( float128 a )
+INLINE uint64_t extractFloat128Frac0( float128 a )
{
return a.high & LIT64( 0x0000FFFFFFFFFFFF );
@@ -905,11 +905,11 @@ INLINE flag extractFloat128Sign( float128 a )
static void
normalizeFloat128Subnormal(
- bits64 aSig0,
- bits64 aSig1,
+ uint64_t aSig0,
+ uint64_t aSig1,
int32 *zExpPtr,
- bits64 *zSig0Ptr,
- bits64 *zSig1Ptr
+ uint64_t *zSig0Ptr,
+ uint64_t *zSig1Ptr
)
{
int8 shiftCount;
@@ -948,12 +948,12 @@ static void
*----------------------------------------------------------------------------*/
INLINE float128
- packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
+ packFloat128( flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 )
{
float128 z;
z.low = zSig1;
- z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;
+ z.high = ( ( (uint64_t) zSign )<<63 ) + ( ( (uint64_t) zExp )<<48 ) +
zSig0;
return z;
}
@@ -981,14 +981,14 @@ INLINE float128
static float128
roundAndPackFloat128(
- flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2
STATUS_PARAM)
+ flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2
STATUS_PARAM)
{
int8 roundingMode;
flag roundNearestEven, increment, isTiny;
roundingMode = STATUS(float_rounding_mode);
roundNearestEven = ( roundingMode == float_round_nearest_even );
- increment = ( (sbits64) zSig2 < 0 );
+ increment = ( (int64_t) zSig2 < 0 );
if ( ! roundNearestEven ) {
if ( roundingMode == float_round_to_zero ) {
increment = 0;
@@ -1002,7 +1002,7 @@ static float128
}
}
}
- if ( 0x7FFD <= (bits32) zExp ) {
+ if ( 0x7FFD <= (uint32_t) zExp ) {
if ( ( 0x7FFD < zExp )
|| ( ( zExp == 0x7FFD )
&& eq128(
@@ -1046,7 +1046,7 @@ static float128
zExp = 0;
if ( isTiny && zSig2 ) float_raise( float_flag_underflow
STATUS_VAR);
if ( roundNearestEven ) {
- increment = ( (sbits64) zSig2 < 0 );
+ increment = ( (int64_t) zSig2 < 0 );
}
else {
if ( zSign ) {
@@ -1082,10 +1082,10 @@ static float128
static float128
normalizeRoundAndPackFloat128(
- flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 STATUS_PARAM)
+ flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM)
{
int8 shiftCount;
- bits64 zSig2;
+ uint64_t zSig2;
if ( zSig0 == 0 ) {
zSig0 = zSig1;
@@ -1119,7 +1119,7 @@ float32 int32_to_float32( int32 a STATUS_PARAM )
flag zSign;
if ( a == 0 ) return float32_zero;
- if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
+ if ( a == (int32_t) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
zSign = ( a < 0 );
return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a
STATUS_VAR );
@@ -1136,7 +1136,7 @@ float64 int32_to_float64( int32 a STATUS_PARAM )
flag zSign;
uint32 absA;
int8 shiftCount;
- bits64 zSig;
+ uint64_t zSig;
if ( a == 0 ) return float64_zero;
zSign = ( a < 0 );
@@ -1161,7 +1161,7 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM )
flag zSign;
uint32 absA;
int8 shiftCount;
- bits64 zSig;
+ uint64_t zSig;
if ( a == 0 ) return packFloatx80( 0, 0, 0 );
zSign = ( a < 0 );
@@ -1187,7 +1187,7 @@ float128 int32_to_float128( int32 a STATUS_PARAM )
flag zSign;
uint32 absA;
int8 shiftCount;
- bits64 zSig0;
+ uint64_t zSig0;
if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
zSign = ( a < 0 );
@@ -1264,7 +1264,7 @@ float64 int64_to_float64( int64 a STATUS_PARAM )
flag zSign;
if ( a == 0 ) return float64_zero;
- if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) {
+ if ( a == (int64_t) LIT64( 0x8000000000000000 ) ) {
return packFloat64( 1, 0x43E, 0 );
}
zSign = ( a < 0 );
@@ -1318,7 +1318,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM )
uint64 absA;
int8 shiftCount;
int32 zExp;
- bits64 zSig0, zSig1;
+ uint64_t zSig0, zSig1;
if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
zSign = ( a < 0 );
@@ -1355,8 +1355,8 @@ int32 float32_to_int32( float32 a STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
- bits64 aSig64;
+ uint32_t aSig;
+ uint64_t aSig64;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
@@ -1386,7 +1386,7 @@ int32 float32_to_int32_round_to_zero( float32 a
STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
+ uint32_t aSig;
int32 z;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -1399,7 +1399,7 @@ int32 float32_to_int32_round_to_zero( float32 a
STATUS_PARAM )
float_raise( float_flag_invalid STATUS_VAR);
if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF;
}
- return (sbits32) 0x80000000;
+ return (int32_t) 0x80000000;
}
else if ( aExp <= 0x7E ) {
if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact;
@@ -1407,7 +1407,7 @@ int32 float32_to_int32_round_to_zero( float32 a
STATUS_PARAM )
}
aSig = ( aSig | 0x00800000 )<<8;
z = aSig>>( - shiftCount );
- if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
+ if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
if ( aSign ) z = - z;
@@ -1429,7 +1429,7 @@ int16 float32_to_int16_round_to_zero( float32 a
STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
+ uint32_t aSig;
int32 z;
aSig = extractFloat32Frac( a );
@@ -1443,7 +1443,7 @@ int16 float32_to_int16_round_to_zero( float32 a
STATUS_PARAM )
return 0x7FFF;
}
}
- return (sbits32) 0xffff8000;
+ return (int32_t) 0xffff8000;
}
else if ( aExp <= 0x7E ) {
if ( aExp | aSig ) {
@@ -1454,7 +1454,7 @@ int16 float32_to_int16_round_to_zero( float32 a
STATUS_PARAM )
shiftCount -= 0x10;
aSig = ( aSig | 0x00800000 )<<8;
z = aSig>>( - shiftCount );
- if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
+ if ( (uint32_t) ( aSig<<( shiftCount & 31 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
if ( aSign ) {
@@ -1478,8 +1478,8 @@ int64 float32_to_int64( float32 a STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
- bits64 aSig64, aSigExtra;
+ uint32_t aSig;
+ uint64_t aSig64, aSigExtra;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
@@ -1491,7 +1491,7 @@ int64 float32_to_int64( float32 a STATUS_PARAM )
if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
if ( aExp ) aSig |= 0x00800000;
aSig64 = aSig;
@@ -1515,8 +1515,8 @@ int64 float32_to_int64_round_to_zero( float32 a
STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits32 aSig;
- bits64 aSig64;
+ uint32_t aSig;
+ uint64_t aSig64;
int64 z;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -1531,7 +1531,7 @@ int64 float32_to_int64_round_to_zero( float32 a
STATUS_PARAM )
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
else if ( aExp <= 0x7E ) {
if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact;
@@ -1540,7 +1540,7 @@ int64 float32_to_int64_round_to_zero( float32 a
STATUS_PARAM )
aSig64 = aSig | 0x00800000;
aSig64 <<= 40;
z = aSig64>>( - shiftCount );
- if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) {
+ if ( (uint64_t) ( aSig64<<( shiftCount & 63 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
if ( aSign ) z = - z;
@@ -1559,7 +1559,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
@@ -1574,7 +1574,7 @@ float64 float32_to_float64( float32 a STATUS_PARAM )
normalizeFloat32Subnormal( aSig, &aExp, &aSig );
--aExp;
}
- return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 );
+ return packFloat64( aSign, aExp + 0x380, ( (uint64_t) aSig )<<29 );
}
@@ -1591,7 +1591,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
@@ -1606,7 +1606,7 @@ floatx80 float32_to_floatx80( float32 a STATUS_PARAM )
normalizeFloat32Subnormal( aSig, &aExp, &aSig );
}
aSig |= 0x00800000;
- return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 );
+ return packFloatx80( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<40 );
}
@@ -1625,7 +1625,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
@@ -1640,7 +1640,7 @@ float128 float32_to_float128( float32 a STATUS_PARAM )
normalizeFloat32Subnormal( aSig, &aExp, &aSig );
--aExp;
}
- return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 );
+ return packFloat128( aSign, aExp + 0x3F80, ( (uint64_t) aSig )<<25, 0 );
}
@@ -1657,9 +1657,9 @@ float32 float32_round_to_int( float32 a STATUS_PARAM)
{
flag aSign;
int16 aExp;
- bits32 lastBitMask, roundBitsMask;
+ uint32_t lastBitMask, roundBitsMask;
int8 roundingMode;
- bits32 z;
+ uint32_t z;
a = float32_squash_input_denormal(a STATUS_VAR);
aExp = extractFloat32Exp( a );
@@ -1670,7 +1670,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM)
return a;
}
if ( aExp <= 0x7E ) {
- if ( (bits32) ( float32_val(a)<<1 ) == 0 ) return a;
+ if ( (uint32_t) ( float32_val(a)<<1 ) == 0 ) return a;
STATUS(float_exception_flags) |= float_flag_inexact;
aSign = extractFloat32Sign( a );
switch ( STATUS(float_rounding_mode) ) {
@@ -1717,7 +1717,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM)
static float32 addFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
{
int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
+ uint32_t aSig, bSig, zSig;
int16 expDiff;
aSig = extractFloat32Frac( a );
@@ -1771,7 +1771,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag
zSign STATUS_PARAM)
aSig |= 0x20000000;
zSig = ( aSig + bSig )<<1;
--zExp;
- if ( (sbits32) zSig < 0 ) {
+ if ( (int32_t) zSig < 0 ) {
zSig = aSig + bSig;
++zExp;
}
@@ -1791,7 +1791,7 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag
zSign STATUS_PARAM)
static float32 subFloat32Sigs( float32 a, float32 b, flag zSign STATUS_PARAM)
{
int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
+ uint32_t aSig, bSig, zSig;
int16 expDiff;
aSig = extractFloat32Frac( a );
@@ -1911,9 +1911,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
int16 aExp, bExp, zExp;
- bits32 aSig, bSig;
- bits64 zSig64;
- bits32 zSig;
+ uint32_t aSig, bSig;
+ uint64_t zSig64;
+ uint32_t zSig;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
@@ -1954,9 +1954,9 @@ float32 float32_mul( float32 a, float32 b STATUS_PARAM )
zExp = aExp + bExp - 0x7F;
aSig = ( aSig | 0x00800000 )<<7;
bSig = ( bSig | 0x00800000 )<<8;
- shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 );
+ shift64RightJamming( ( (uint64_t) aSig ) * bSig, 32, &zSig64 );
zSig = zSig64;
- if ( 0 <= (sbits32) ( zSig<<1 ) ) {
+ if ( 0 <= (int32_t) ( zSig<<1 ) ) {
zSig <<= 1;
--zExp;
}
@@ -1974,7 +1974,7 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
+ uint32_t aSig, bSig, zSig;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
@@ -2020,9 +2020,9 @@ float32 float32_div( float32 a, float32 b STATUS_PARAM )
aSig >>= 1;
++zExp;
}
- zSig = ( ( (bits64) aSig )<<32 ) / bSig;
+ zSig = ( ( (uint64_t) aSig )<<32 ) / bSig;
if ( ( zSig & 0x3F ) == 0 ) {
- zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );
+ zSig |= ( (uint64_t) bSig * zSig != ( (uint64_t) aSig )<<32 );
}
return roundAndPackFloat32( zSign, zExp, zSig STATUS_VAR );
@@ -2038,11 +2038,11 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM )
{
flag aSign, zSign;
int16 aExp, bExp, expDiff;
- bits32 aSig, bSig;
- bits32 q;
- bits64 aSig64, bSig64, q64;
- bits32 alternateASig;
- sbits32 sigMean;
+ uint32_t aSig, bSig;
+ uint32_t q;
+ uint64_t aSig64, bSig64, q64;
+ uint32_t alternateASig;
+ int32_t sigMean;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
@@ -2086,7 +2086,7 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM )
q = ( bSig <= aSig );
if ( q ) aSig -= bSig;
if ( 0 < expDiff ) {
- q = ( ( (bits64) aSig )<<32 ) / bSig;
+ q = ( ( (uint64_t) aSig )<<32 ) / bSig;
q >>= 32 - expDiff;
bSig >>= 2;
aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
@@ -2098,8 +2098,8 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM )
}
else {
if ( bSig <= aSig ) aSig -= bSig;
- aSig64 = ( (bits64) aSig )<<40;
- bSig64 = ( (bits64) bSig )<<40;
+ aSig64 = ( (uint64_t) aSig )<<40;
+ bSig64 = ( (uint64_t) bSig )<<40;
expDiff -= 64;
while ( 0 < expDiff ) {
q64 = estimateDiv128To64( aSig64, 0, bSig64 );
@@ -2118,12 +2118,12 @@ float32 float32_rem( float32 a, float32 b STATUS_PARAM )
alternateASig = aSig;
++q;
aSig -= bSig;
- } while ( 0 <= (sbits32) aSig );
+ } while ( 0 <= (int32_t) aSig );
sigMean = aSig + alternateASig;
if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
aSig = alternateASig;
}
- zSign = ( (sbits32) aSig < 0 );
+ zSign = ( (int32_t) aSig < 0 );
if ( zSign ) aSig = - aSig;
return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig STATUS_VAR
);
@@ -2139,8 +2139,8 @@ float32 float32_sqrt( float32 a STATUS_PARAM )
{
flag aSign;
int16 aExp, zExp;
- bits32 aSig, zSig;
- bits64 rem, term;
+ uint32_t aSig, zSig;
+ uint64_t rem, term;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
@@ -2170,11 +2170,11 @@ float32 float32_sqrt( float32 a STATUS_PARAM )
goto roundAndPack;
}
aSig >>= aExp & 1;
- term = ( (bits64) zSig ) * zSig;
- rem = ( ( (bits64) aSig )<<32 ) - term;
- while ( (sbits64) rem < 0 ) {
+ term = ( (uint64_t) zSig ) * zSig;
+ rem = ( ( (uint64_t) aSig )<<32 ) - term;
+ while ( (int64_t) rem < 0 ) {
--zSig;
- rem += ( ( (bits64) zSig )<<1 ) | 1;
+ rem += ( ( (uint64_t) zSig )<<1 ) | 1;
}
zSig |= ( rem != 0 );
}
@@ -2225,7 +2225,7 @@ float32 float32_exp2( float32 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
float64 r, x, xn;
int i;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -2273,7 +2273,7 @@ float32 float32_log2( float32 a STATUS_PARAM )
{
flag aSign, zSign;
int16 aExp;
- bits32 aSig, zSig, i;
+ uint32_t aSig, zSig, i;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
@@ -2299,7 +2299,7 @@ float32 float32_log2( float32 a STATUS_PARAM )
zSig = aExp << 23;
for (i = 1 << 22; i > 0; i >>= 1) {
- aSig = ( (bits64)aSig * aSig ) >> 23;
+ aSig = ( (uint64_t)aSig * aSig ) >> 23;
if ( aSig & 0x01000000 ) {
aSig >>= 1;
zSig |= i;
@@ -2332,7 +2332,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM )
return 0;
}
return ( float32_val(a) == float32_val(b) ) ||
- ( (bits32) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 );
+ ( (uint32_t) ( ( float32_val(a) | float32_val(b) )<<1 ) == 0 );
}
@@ -2346,7 +2346,7 @@ int float32_eq( float32 a, float32 b STATUS_PARAM )
int float32_le( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign;
- bits32 av, bv;
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
@@ -2360,7 +2360,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM )
bSign = extractFloat32Sign( b );
av = float32_val(a);
bv = float32_val(b);
- if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 );
+ if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0
);
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
@@ -2374,7 +2374,7 @@ int float32_le( float32 a, float32 b STATUS_PARAM )
int float32_lt( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign;
- bits32 av, bv;
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
@@ -2388,7 +2388,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM )
bSign = extractFloat32Sign( b );
av = float32_val(a);
bv = float32_val(b);
- if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 );
+ if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0
);
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
@@ -2402,7 +2402,7 @@ int float32_lt( float32 a, float32 b STATUS_PARAM )
int float32_eq_signaling( float32 a, float32 b STATUS_PARAM )
{
- bits32 av, bv;
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
@@ -2414,7 +2414,7 @@ int float32_eq_signaling( float32 a, float32 b
STATUS_PARAM )
}
av = float32_val(a);
bv = float32_val(b);
- return ( av == bv ) || ( (bits32) ( ( av | bv )<<1 ) == 0 );
+ return ( av == bv ) || ( (uint32_t) ( ( av | bv )<<1 ) == 0 );
}
@@ -2428,7 +2428,7 @@ int float32_eq_signaling( float32 a, float32 b
STATUS_PARAM )
int float32_le_quiet( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign;
- bits32 av, bv;
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
@@ -2444,7 +2444,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM )
bSign = extractFloat32Sign( b );
av = float32_val(a);
bv = float32_val(b);
- if ( aSign != bSign ) return aSign || ( (bits32) ( ( av | bv )<<1 ) == 0 );
+ if ( aSign != bSign ) return aSign || ( (uint32_t) ( ( av | bv )<<1 ) == 0
);
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
@@ -2459,7 +2459,7 @@ int float32_le_quiet( float32 a, float32 b STATUS_PARAM )
int float32_lt_quiet( float32 a, float32 b STATUS_PARAM )
{
flag aSign, bSign;
- bits32 av, bv;
+ uint32_t av, bv;
a = float32_squash_input_denormal(a STATUS_VAR);
b = float32_squash_input_denormal(b STATUS_VAR);
@@ -2475,7 +2475,7 @@ int float32_lt_quiet( float32 a, float32 b STATUS_PARAM )
bSign = extractFloat32Sign( b );
av = float32_val(a);
bv = float32_val(b);
- if ( aSign != bSign ) return aSign && ( (bits32) ( ( av | bv )<<1 ) != 0 );
+ if ( aSign != bSign ) return aSign && ( (uint32_t) ( ( av | bv )<<1 ) != 0
);
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
@@ -2494,7 +2494,7 @@ int32 float64_to_int32( float64 a STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig;
+ uint64_t aSig;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
@@ -2522,7 +2522,7 @@ int32 float64_to_int32_round_to_zero( float64 a
STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig, savedASig;
+ uint64_t aSig, savedASig;
int32 z;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -2546,7 +2546,7 @@ int32 float64_to_int32_round_to_zero( float64 a
STATUS_PARAM )
if ( ( z < 0 ) ^ aSign ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
}
if ( ( aSig<<shiftCount ) != savedASig ) {
STATUS(float_exception_flags) |= float_flag_inexact;
@@ -2569,7 +2569,7 @@ int16 float64_to_int16_round_to_zero( float64 a
STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig, savedASig;
+ uint64_t aSig, savedASig;
int32 z;
aSig = extractFloat64Frac( a );
@@ -2598,7 +2598,7 @@ int16 float64_to_int16_round_to_zero( float64 a
STATUS_PARAM )
if ( ( (int16_t)z < 0 ) ^ aSign ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- return aSign ? (sbits32) 0xffff8000 : 0x7FFF;
+ return aSign ? (int32_t) 0xffff8000 : 0x7FFF;
}
if ( ( aSig<<shiftCount ) != savedASig ) {
STATUS(float_exception_flags) |= float_flag_inexact;
@@ -2620,7 +2620,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig, aSigExtra;
+ uint64_t aSig, aSigExtra;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
@@ -2637,7 +2637,7 @@ int64 float64_to_int64( float64 a STATUS_PARAM )
) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
aSigExtra = 0;
aSig <<= - shiftCount;
@@ -2663,7 +2663,7 @@ int64 float64_to_int64_round_to_zero( float64 a
STATUS_PARAM )
{
flag aSign;
int16 aExp, shiftCount;
- bits64 aSig;
+ uint64_t aSig;
int64 z;
a = float64_squash_input_denormal(a STATUS_VAR);
@@ -2683,7 +2683,7 @@ int64 float64_to_int64_round_to_zero( float64 a
STATUS_PARAM )
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
z = aSig<<shiftCount;
}
@@ -2693,7 +2693,7 @@ int64 float64_to_int64_round_to_zero( float64 a
STATUS_PARAM )
return 0;
}
z = aSig>>( - shiftCount );
- if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {
+ if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
}
@@ -2713,8 +2713,8 @@ float32 float64_to_float32( float64 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits64 aSig;
- bits32 zSig;
+ uint64_t aSig;
+ uint32_t zSig;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
@@ -2745,10 +2745,10 @@ float32 float64_to_float32( float64 a STATUS_PARAM )
| than the desired result exponent whenever `zSig' is a complete, normalized
| significand.
*----------------------------------------------------------------------------*/
-static float16 packFloat16(flag zSign, int16 zExp, bits16 zSig)
+static float16 packFloat16(flag zSign, int16 zExp, uint16_t zSig)
{
return make_float16(
- (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig);
+ (((uint32_t)zSign) << 15) + (((uint32_t)zExp) << 10) + zSig);
}
/* Half precision floats come in two formats: standard IEEE and "ARM" format.
@@ -2758,7 +2758,7 @@ float32 float16_to_float32(float16 a, flag ieee
STATUS_PARAM)
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
aSign = extractFloat16Sign(a);
aExp = extractFloat16Exp(a);
@@ -2788,9 +2788,9 @@ float16 float32_to_float16(float32 a, flag ieee
STATUS_PARAM)
{
flag aSign;
int16 aExp;
- bits32 aSig;
- bits32 mask;
- bits32 increment;
+ uint32_t aSig;
+ uint32_t mask;
+ uint32_t increment;
int8 roundingMode;
a = float32_squash_input_denormal(a STATUS_VAR);
@@ -2891,7 +2891,7 @@ floatx80 float64_to_floatx80( float64 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits64 aSig;
+ uint64_t aSig;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
@@ -2926,7 +2926,7 @@ float128 float64_to_float128( float64 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits64 aSig, zSig0, zSig1;
+ uint64_t aSig, zSig0, zSig1;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
@@ -2959,9 +2959,9 @@ float64 float64_round_to_int( float64 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits64 lastBitMask, roundBitsMask;
+ uint64_t lastBitMask, roundBitsMask;
int8 roundingMode;
- bits64 z;
+ uint64_t z;
a = float64_squash_input_denormal(a STATUS_VAR);
aExp = extractFloat64Exp( a );
@@ -2972,7 +2972,7 @@ float64 float64_round_to_int( float64 a STATUS_PARAM )
return a;
}
if ( aExp < 0x3FF ) {
- if ( (bits64) ( float64_val(a)<<1 ) == 0 ) return a;
+ if ( (uint64_t) ( float64_val(a)<<1 ) == 0 ) return a;
STATUS(float_exception_flags) |= float_flag_inexact;
aSign = extractFloat64Sign( a );
switch ( STATUS(float_rounding_mode) ) {
@@ -3032,7 +3032,7 @@ float64 float64_trunc_to_int( float64 a STATUS_PARAM)
static float64 addFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
{
int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig;
+ uint64_t aSig, bSig, zSig;
int16 expDiff;
aSig = extractFloat64Frac( a );
@@ -3086,7 +3086,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag
zSign STATUS_PARAM )
aSig |= LIT64( 0x2000000000000000 );
zSig = ( aSig + bSig )<<1;
--zExp;
- if ( (sbits64) zSig < 0 ) {
+ if ( (int64_t) zSig < 0 ) {
zSig = aSig + bSig;
++zExp;
}
@@ -3106,7 +3106,7 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag
zSign STATUS_PARAM )
static float64 subFloat64Sigs( float64 a, float64 b, flag zSign STATUS_PARAM )
{
int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig;
+ uint64_t aSig, bSig, zSig;
int16 expDiff;
aSig = extractFloat64Frac( a );
@@ -3226,7 +3226,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
+ uint64_t aSig, bSig, zSig0, zSig1;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
@@ -3269,7 +3269,7 @@ float64 float64_mul( float64 a, float64 b STATUS_PARAM )
bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
mul64To128( aSig, bSig, &zSig0, &zSig1 );
zSig0 |= ( zSig1 != 0 );
- if ( 0 <= (sbits64) ( zSig0<<1 ) ) {
+ if ( 0 <= (int64_t) ( zSig0<<1 ) ) {
zSig0 <<= 1;
--zExp;
}
@@ -3287,9 +3287,9 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign, zSign;
int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig;
- bits64 rem0, rem1;
- bits64 term0, term1;
+ uint64_t aSig, bSig, zSig;
+ uint64_t rem0, rem1;
+ uint64_t term0, term1;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
@@ -3339,7 +3339,7 @@ float64 float64_div( float64 a, float64 b STATUS_PARAM )
if ( ( zSig & 0x1FF ) <= 2 ) {
mul64To128( bSig, zSig, &term0, &term1 );
sub128( aSig, 0, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig;
add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
}
@@ -3359,9 +3359,9 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM )
{
flag aSign, zSign;
int16 aExp, bExp, expDiff;
- bits64 aSig, bSig;
- bits64 q, alternateASig;
- sbits64 sigMean;
+ uint64_t aSig, bSig;
+ uint64_t q, alternateASig;
+ int64_t sigMean;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
@@ -3424,12 +3424,12 @@ float64 float64_rem( float64 a, float64 b STATUS_PARAM )
alternateASig = aSig;
++q;
aSig -= bSig;
- } while ( 0 <= (sbits64) aSig );
+ } while ( 0 <= (int64_t) aSig );
sigMean = aSig + alternateASig;
if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
aSig = alternateASig;
}
- zSign = ( (sbits64) aSig < 0 );
+ zSign = ( (int64_t) aSig < 0 );
if ( zSign ) aSig = - aSig;
return normalizeRoundAndPackFloat64( aSign ^ zSign, bExp, aSig STATUS_VAR
);
@@ -3445,8 +3445,8 @@ float64 float64_sqrt( float64 a STATUS_PARAM )
{
flag aSign;
int16 aExp, zExp;
- bits64 aSig, zSig, doubleZSig;
- bits64 rem0, rem1, term0, term1;
+ uint64_t aSig, zSig, doubleZSig;
+ uint64_t rem0, rem1, term0, term1;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
@@ -3476,7 +3476,7 @@ float64 float64_sqrt( float64 a STATUS_PARAM )
doubleZSig = zSig<<1;
mul64To128( zSig, zSig, &term0, &term1 );
sub128( aSig, 0, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig;
doubleZSig -= 2;
add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 );
@@ -3496,7 +3496,7 @@ float64 float64_log2( float64 a STATUS_PARAM )
{
flag aSign, zSign;
int16 aExp;
- bits64 aSig, aSig0, aSig1, zSig, i;
+ uint64_t aSig, aSig0, aSig1, zSig, i;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
@@ -3519,7 +3519,7 @@ float64 float64_log2( float64 a STATUS_PARAM )
aExp -= 0x3FF;
aSig |= LIT64( 0x0010000000000000 );
zSign = aExp < 0;
- zSig = (bits64)aExp << 52;
+ zSig = (uint64_t)aExp << 52;
for (i = 1LL << 51; i > 0; i >>= 1) {
mul64To128( aSig, aSig, &aSig0, &aSig1 );
aSig = ( aSig0 << 12 ) | ( aSig1 >> 52 );
@@ -3542,7 +3542,7 @@ float64 float64_log2( float64 a STATUS_PARAM )
int float64_eq( float64 a, float64 b STATUS_PARAM )
{
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
@@ -3556,7 +3556,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM )
}
av = float64_val(a);
bv = float64_val(b);
- return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 );
+ return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
}
@@ -3570,7 +3570,7 @@ int float64_eq( float64 a, float64 b STATUS_PARAM )
int float64_le( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign;
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
@@ -3584,7 +3584,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM )
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
- if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 );
+ if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0
);
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
@@ -3598,7 +3598,7 @@ int float64_le( float64 a, float64 b STATUS_PARAM )
int float64_lt( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign;
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
@@ -3612,7 +3612,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM )
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
- if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 );
+ if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0
);
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
@@ -3626,7 +3626,7 @@ int float64_lt( float64 a, float64 b STATUS_PARAM )
int float64_eq_signaling( float64 a, float64 b STATUS_PARAM )
{
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
@@ -3638,7 +3638,7 @@ int float64_eq_signaling( float64 a, float64 b
STATUS_PARAM )
}
av = float64_val(a);
bv = float64_val(b);
- return ( av == bv ) || ( (bits64) ( ( av | bv )<<1 ) == 0 );
+ return ( av == bv ) || ( (uint64_t) ( ( av | bv )<<1 ) == 0 );
}
@@ -3652,7 +3652,7 @@ int float64_eq_signaling( float64 a, float64 b
STATUS_PARAM )
int float64_le_quiet( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign;
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
@@ -3668,7 +3668,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM )
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
- if ( aSign != bSign ) return aSign || ( (bits64) ( ( av | bv )<<1 ) == 0 );
+ if ( aSign != bSign ) return aSign || ( (uint64_t) ( ( av | bv )<<1 ) == 0
);
return ( av == bv ) || ( aSign ^ ( av < bv ) );
}
@@ -3683,7 +3683,7 @@ int float64_le_quiet( float64 a, float64 b STATUS_PARAM )
int float64_lt_quiet( float64 a, float64 b STATUS_PARAM )
{
flag aSign, bSign;
- bits64 av, bv;
+ uint64_t av, bv;
a = float64_squash_input_denormal(a STATUS_VAR);
b = float64_squash_input_denormal(b STATUS_VAR);
@@ -3699,7 +3699,7 @@ int float64_lt_quiet( float64 a, float64 b STATUS_PARAM )
bSign = extractFloat64Sign( b );
av = float64_val(a);
bv = float64_val(b);
- if ( aSign != bSign ) return aSign && ( (bits64) ( ( av | bv )<<1 ) != 0 );
+ if ( aSign != bSign ) return aSign && ( (uint64_t) ( ( av | bv )<<1 ) != 0
);
return ( av != bv ) && ( aSign ^ ( av < bv ) );
}
@@ -3720,12 +3720,12 @@ int32 floatx80_to_int32( floatx80 a STATUS_PARAM )
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig;
+ uint64_t aSig;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
- if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;
+ if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
shiftCount = 0x4037 - aExp;
if ( shiftCount <= 0 ) shiftCount = 1;
shift64RightJamming( aSig, shiftCount, &aSig );
@@ -3747,14 +3747,14 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a
STATUS_PARAM )
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig, savedASig;
+ uint64_t aSig, savedASig;
int32 z;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
if ( 0x401E < aExp ) {
- if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;
+ if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) aSign = 0;
goto invalid;
}
else if ( aExp < 0x3FFF ) {
@@ -3769,7 +3769,7 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a
STATUS_PARAM )
if ( ( z < 0 ) ^ aSign ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
}
if ( ( aSig<<shiftCount ) != savedASig ) {
STATUS(float_exception_flags) |= float_flag_inexact;
@@ -3792,7 +3792,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM )
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig, aSigExtra;
+ uint64_t aSig, aSigExtra;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
@@ -3807,7 +3807,7 @@ int64 floatx80_to_int64( floatx80 a STATUS_PARAM )
) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
aSigExtra = 0;
}
@@ -3832,7 +3832,7 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a
STATUS_PARAM )
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig;
+ uint64_t aSig;
int64 z;
aSig = extractFloatx80Frac( a );
@@ -3847,14 +3847,14 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a
STATUS_PARAM )
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
else if ( aExp < 0x3FFF ) {
if ( aExp | aSig ) STATUS(float_exception_flags) |= float_flag_inexact;
return 0;
}
z = aSig>>( - shiftCount );
- if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {
+ if ( (uint64_t) ( aSig<<( shiftCount & 63 ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
if ( aSign ) z = - z;
@@ -3873,13 +3873,13 @@ float32 floatx80_to_float32( floatx80 a STATUS_PARAM )
{
flag aSign;
int32 aExp;
- bits64 aSig;
+ uint64_t aSig;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) {
+ if ( (uint64_t) ( aSig<<1 ) ) {
return commonNaNToFloat32( floatx80ToCommonNaN( a STATUS_VAR )
STATUS_VAR );
}
return packFloat32( aSign, 0xFF, 0 );
@@ -3901,13 +3901,13 @@ float64 floatx80_to_float64( floatx80 a STATUS_PARAM )
{
flag aSign;
int32 aExp;
- bits64 aSig, zSig;
+ uint64_t aSig, zSig;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) {
+ if ( (uint64_t) ( aSig<<1 ) ) {
return commonNaNToFloat64( floatx80ToCommonNaN( a STATUS_VAR )
STATUS_VAR );
}
return packFloat64( aSign, 0x7FF, 0 );
@@ -3931,12 +3931,12 @@ float128 floatx80_to_float128( floatx80 a STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits64 aSig, zSig0, zSig1;
+ uint64_t aSig, zSig0, zSig1;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
- if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) {
+ if ( ( aExp == 0x7FFF ) && (uint64_t) ( aSig<<1 ) ) {
return commonNaNToFloat128( floatx80ToCommonNaN( a STATUS_VAR )
STATUS_VAR );
}
shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );
@@ -3957,27 +3957,27 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM
)
{
flag aSign;
int32 aExp;
- bits64 lastBitMask, roundBitsMask;
+ uint64_t lastBitMask, roundBitsMask;
int8 roundingMode;
floatx80 z;
aExp = extractFloatx80Exp( a );
if ( 0x403E <= aExp ) {
- if ( ( aExp == 0x7FFF ) && (bits64) ( extractFloatx80Frac( a )<<1 ) ) {
+ if ( ( aExp == 0x7FFF ) && (uint64_t) ( extractFloatx80Frac( a )<<1 )
) {
return propagateFloatx80NaN( a, a STATUS_VAR );
}
return a;
}
if ( aExp < 0x3FFF ) {
if ( ( aExp == 0 )
- && ( (bits64) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {
+ && ( (uint64_t) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {
return a;
}
STATUS(float_exception_flags) |= float_flag_inexact;
aSign = extractFloatx80Sign( a );
switch ( STATUS(float_rounding_mode) ) {
case float_round_nearest_even:
- if ( ( aExp == 0x3FFE ) && (bits64) ( extractFloatx80Frac( a )<<1 )
+ if ( ( aExp == 0x3FFE ) && (uint64_t) ( extractFloatx80Frac( a
)<<1 )
) {
return
packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) );
@@ -4030,7 +4030,7 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM )
static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign
STATUS_PARAM)
{
int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
+ uint64_t aSig, bSig, zSig0, zSig1;
int32 expDiff;
aSig = extractFloatx80Frac( a );
@@ -4040,7 +4040,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
expDiff = aExp - bExp;
if ( 0 < expDiff ) {
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
+ if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
return a;
}
if ( bExp == 0 ) --expDiff;
@@ -4049,7 +4049,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
}
else if ( expDiff < 0 ) {
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( aExp == 0 ) ++expDiff;
@@ -4058,7 +4058,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
}
else {
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( ( aSig | bSig )<<1 ) ) {
+ if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
return propagateFloatx80NaN( a, b STATUS_VAR );
}
return a;
@@ -4073,7 +4073,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
goto shiftRight1;
}
zSig0 = aSig + bSig;
- if ( (sbits64) zSig0 < 0 ) goto roundAndPack;
+ if ( (int64_t) zSig0 < 0 ) goto roundAndPack;
shiftRight1:
shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );
zSig0 |= LIT64( 0x8000000000000000 );
@@ -4096,7 +4096,7 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign
STATUS_PARAM )
{
int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
+ uint64_t aSig, bSig, zSig0, zSig1;
int32 expDiff;
floatx80 z;
@@ -4108,7 +4108,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
if ( 0 < expDiff ) goto aExpBigger;
if ( expDiff < 0 ) goto bExpBigger;
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( ( aSig | bSig )<<1 ) ) {
+ if ( (uint64_t) ( ( aSig | bSig )<<1 ) ) {
return propagateFloatx80NaN( a, b STATUS_VAR );
}
float_raise( float_flag_invalid STATUS_VAR);
@@ -4126,7 +4126,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
return packFloatx80( STATUS(float_rounding_mode) == float_round_down, 0, 0
);
bExpBigger:
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( aExp == 0 ) ++expDiff;
@@ -4138,7 +4138,7 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b,
flag zSign STATUS_PARAM
goto normalizeRoundAndPack;
aExpBigger:
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
+ if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
return a;
}
if ( bExp == 0 ) --expDiff;
@@ -4205,7 +4205,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b
STATUS_PARAM )
{
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
+ uint64_t aSig, bSig, zSig0, zSig1;
floatx80 z;
aSig = extractFloatx80Frac( a );
@@ -4216,15 +4216,15 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b
STATUS_PARAM )
bSign = extractFloatx80Sign( b );
zSign = aSign ^ bSign;
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 )
- || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {
+ if ( (uint64_t) ( aSig<<1 )
+ || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
return propagateFloatx80NaN( a, b STATUS_VAR );
}
if ( ( bExp | bSig ) == 0 ) goto invalid;
return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
if ( ( aExp | aSig ) == 0 ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
@@ -4244,7 +4244,7 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b
STATUS_PARAM )
}
zExp = aExp + bExp - 0x3FFE;
mul64To128( aSig, bSig, &zSig0, &zSig1 );
- if ( 0 < (sbits64) zSig0 ) {
+ if ( 0 < (int64_t) zSig0 ) {
shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 );
--zExp;
}
@@ -4264,8 +4264,8 @@ floatx80 floatx80_div( floatx80 a, floatx80 b
STATUS_PARAM )
{
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
- bits64 rem0, rem1, rem2, term0, term1, term2;
+ uint64_t aSig, bSig, zSig0, zSig1;
+ uint64_t rem0, rem1, rem2, term0, term1, term2;
floatx80 z;
aSig = extractFloatx80Frac( a );
@@ -4276,15 +4276,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b
STATUS_PARAM )
bSign = extractFloatx80Sign( b );
zSign = aSign ^ bSign;
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
+ if ( (uint64_t) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
goto invalid;
}
return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
}
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
return packFloatx80( zSign, 0, 0 );
}
if ( bExp == 0 ) {
@@ -4314,15 +4314,15 @@ floatx80 floatx80_div( floatx80 a, floatx80 b
STATUS_PARAM )
zSig0 = estimateDiv128To64( aSig, rem1, bSig );
mul64To128( bSig, zSig0, &term0, &term1 );
sub128( aSig, rem1, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig0;
add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
}
zSig1 = estimateDiv128To64( rem1, 0, bSig );
- if ( (bits64) ( zSig1<<1 ) <= 8 ) {
+ if ( (uint64_t) ( zSig1<<1 ) <= 8 ) {
mul64To128( bSig, zSig1, &term1, &term2 );
sub128( rem1, 0, term1, term2, &rem1, &rem2 );
- while ( (sbits64) rem1 < 0 ) {
+ while ( (int64_t) rem1 < 0 ) {
--zSig1;
add128( rem1, rem2, 0, bSig, &rem1, &rem2 );
}
@@ -4344,8 +4344,8 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b
STATUS_PARAM )
{
flag aSign, zSign;
int32 aExp, bExp, expDiff;
- bits64 aSig0, aSig1, bSig;
- bits64 q, term0, term1, alternateASig0, alternateASig1;
+ uint64_t aSig0, aSig1, bSig;
+ uint64_t q, term0, term1, alternateASig0, alternateASig1;
floatx80 z;
aSig0 = extractFloatx80Frac( a );
@@ -4354,14 +4354,14 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b
STATUS_PARAM )
bSig = extractFloatx80Frac( b );
bExp = extractFloatx80Exp( b );
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig0<<1 )
- || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {
+ if ( (uint64_t) ( aSig0<<1 )
+ || ( ( bExp == 0x7FFF ) && (uint64_t) ( bSig<<1 ) ) ) {
return propagateFloatx80NaN( a, b STATUS_VAR );
}
goto invalid;
}
if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
+ if ( (uint64_t) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b
STATUS_VAR );
return a;
}
if ( bExp == 0 ) {
@@ -4375,7 +4375,7 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b
STATUS_PARAM )
normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
}
if ( aExp == 0 ) {
- if ( (bits64) ( aSig0<<1 ) == 0 ) return a;
+ if ( (uint64_t) ( aSig0<<1 ) == 0 ) return a;
normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
}
bSig |= LIT64( 0x8000000000000000 );
@@ -4440,15 +4440,15 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM )
{
flag aSign;
int32 aExp, zExp;
- bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0;
- bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
+ uint64_t aSig0, aSig1, zSig0, zSig1, doubleZSig0;
+ uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
floatx80 z;
aSig0 = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
aSign = extractFloatx80Sign( a );
if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a
STATUS_VAR );
+ if ( (uint64_t) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a
STATUS_VAR );
if ( ! aSign ) return a;
goto invalid;
}
@@ -4471,7 +4471,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM )
doubleZSig0 = zSig0<<1;
mul64To128( zSig0, zSig0, &term0, &term1 );
sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig0;
doubleZSig0 -= 2;
add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
@@ -4483,7 +4483,7 @@ floatx80 floatx80_sqrt( floatx80 a STATUS_PARAM )
sub128( rem1, 0, term1, term2, &rem1, &rem2 );
mul64To128( zSig1, zSig1, &term2, &term3 );
sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits64) rem1 < 0 ) {
+ while ( (int64_t) rem1 < 0 ) {
--zSig1;
shortShift128Left( 0, zSig1, 1, &term2, &term3 );
term3 |= 1;
@@ -4511,9 +4511,9 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM )
{
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
if ( floatx80_is_signaling_nan( a )
|| floatx80_is_signaling_nan( b ) ) {
@@ -4525,7 +4525,7 @@ int floatx80_eq( floatx80 a, floatx80 b STATUS_PARAM )
( a.low == b.low )
&& ( ( a.high == b.high )
|| ( ( a.low == 0 )
- && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )
+ && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
);
}
@@ -4542,9 +4542,9 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM )
flag aSign, bSign;
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
float_raise( float_flag_invalid STATUS_VAR);
return 0;
@@ -4554,7 +4554,7 @@ int floatx80_le( floatx80 a, floatx80 b STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low |
b.low )
== 0 );
}
return
@@ -4575,9 +4575,9 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM )
flag aSign, bSign;
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
float_raise( float_flag_invalid STATUS_VAR);
return 0;
@@ -4587,7 +4587,7 @@ int floatx80_lt( floatx80 a, floatx80 b STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low |
b.low )
!= 0 );
}
return
@@ -4607,9 +4607,9 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b
STATUS_PARAM )
{
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
float_raise( float_flag_invalid STATUS_VAR);
return 0;
@@ -4618,7 +4618,7 @@ int floatx80_eq_signaling( floatx80 a, floatx80 b
STATUS_PARAM )
( a.low == b.low )
&& ( ( a.high == b.high )
|| ( ( a.low == 0 )
- && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )
+ && ( (uint16_t) ( ( a.high | b.high )<<1 ) == 0 ) )
);
}
@@ -4635,9 +4635,9 @@ int floatx80_le_quiet( floatx80 a, floatx80 b
STATUS_PARAM )
flag aSign, bSign;
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
if ( floatx80_is_signaling_nan( a )
|| floatx80_is_signaling_nan( b ) ) {
@@ -4650,7 +4650,7 @@ int floatx80_le_quiet( floatx80 a, floatx80 b
STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ || ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low |
b.low )
== 0 );
}
return
@@ -4671,9 +4671,9 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b
STATUS_PARAM )
flag aSign, bSign;
if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( a )<<1 ) )
|| ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ && (uint64_t) ( extractFloatx80Frac( b )<<1 ) )
) {
if ( floatx80_is_signaling_nan( a )
|| floatx80_is_signaling_nan( b ) ) {
@@ -4686,7 +4686,7 @@ int floatx80_lt_quiet( floatx80 a, floatx80 b
STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ && ( ( ( (uint16_t) ( ( a.high | b.high )<<1 ) ) | a.low |
b.low )
!= 0 );
}
return
@@ -4713,7 +4713,7 @@ int32 float128_to_int32( float128 a STATUS_PARAM )
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -4742,7 +4742,7 @@ int32 float128_to_int32_round_to_zero( float128 a
STATUS_PARAM )
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig0, aSig1, savedASig;
+ uint64_t aSig0, aSig1, savedASig;
int32 z;
aSig1 = extractFloat128Frac1( a );
@@ -4767,7 +4767,7 @@ int32 float128_to_int32_round_to_zero( float128 a
STATUS_PARAM )
if ( ( z < 0 ) ^ aSign ) {
invalid:
float_raise( float_flag_invalid STATUS_VAR);
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF;
}
if ( ( aSig0<<shiftCount ) != savedASig ) {
STATUS(float_exception_flags) |= float_flag_inexact;
@@ -4790,7 +4790,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM )
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -4808,7 +4808,7 @@ int64 float128_to_int64( float128 a STATUS_PARAM )
) {
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );
}
@@ -4833,7 +4833,7 @@ int64 float128_to_int64_round_to_zero( float128 a
STATUS_PARAM )
{
flag aSign;
int32 aExp, shiftCount;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
int64 z;
aSig1 = extractFloat128Frac1( a );
@@ -4855,10 +4855,10 @@ int64 float128_to_int64_round_to_zero( float128 a
STATUS_PARAM )
return LIT64( 0x7FFFFFFFFFFFFFFF );
}
}
- return (sbits64) LIT64( 0x8000000000000000 );
+ return (int64_t) LIT64( 0x8000000000000000 );
}
z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );
- if ( (bits64) ( aSig1<<shiftCount ) ) {
+ if ( (uint64_t) ( aSig1<<shiftCount ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
}
@@ -4871,7 +4871,7 @@ int64 float128_to_int64_round_to_zero( float128 a
STATUS_PARAM )
}
z = aSig0>>( - shiftCount );
if ( aSig1
- || ( shiftCount && (bits64) ( aSig0<<( shiftCount & 63 ) ) ) ) {
+ || ( shiftCount && (uint64_t) ( aSig0<<( shiftCount & 63 ) ) ) ) {
STATUS(float_exception_flags) |= float_flag_inexact;
}
}
@@ -4891,8 +4891,8 @@ float32 float128_to_float32( float128 a STATUS_PARAM )
{
flag aSign;
int32 aExp;
- bits64 aSig0, aSig1;
- bits32 zSig;
+ uint64_t aSig0, aSig1;
+ uint32_t zSig;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -4926,7 +4926,7 @@ float64 float128_to_float64( float128 a STATUS_PARAM )
{
flag aSign;
int32 aExp;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -4961,7 +4961,7 @@ floatx80 float128_to_floatx80( float128 a STATUS_PARAM )
{
flag aSign;
int32 aExp;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
@@ -4998,7 +4998,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM )
{
flag aSign;
int32 aExp;
- bits64 lastBitMask, roundBitsMask;
+ uint64_t lastBitMask, roundBitsMask;
int8 roundingMode;
float128 z;
@@ -5023,9 +5023,9 @@ float128 float128_round_to_int( float128 a STATUS_PARAM )
if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
}
else {
- if ( (sbits64) z.low < 0 ) {
+ if ( (int64_t) z.low < 0 ) {
++z.high;
- if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1;
+ if ( (uint64_t) ( z.low<<1 ) == 0 ) z.high &= ~1;
}
}
}
@@ -5039,7 +5039,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM )
}
else {
if ( aExp < 0x3FFF ) {
- if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
+ if ( ( ( (uint64_t) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
STATUS(float_exception_flags) |= float_flag_inexact;
aSign = extractFloat128Sign( a );
switch ( STATUS(float_rounding_mode) ) {
@@ -5101,7 +5101,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM )
static float128 addFloat128Sigs( float128 a, float128 b, flag zSign
STATUS_PARAM)
{
int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
+ uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
int32 expDiff;
aSig1 = extractFloat128Frac1( a );
@@ -5182,7 +5182,7 @@ static float128 addFloat128Sigs( float128 a, float128 b,
flag zSign STATUS_PARAM
static float128 subFloat128Sigs( float128 a, float128 b, flag zSign
STATUS_PARAM)
{
int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
+ uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
int32 expDiff;
float128 z;
@@ -5307,7 +5307,7 @@ float128 float128_mul( float128 a, float128 b
STATUS_PARAM )
{
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
+ uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
float128 z;
aSig1 = extractFloat128Frac1( a );
@@ -5371,8 +5371,8 @@ float128 float128_div( float128 a, float128 b
STATUS_PARAM )
{
flag aSign, bSign, zSign;
int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
- bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
+ uint64_t aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
+ uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
float128 z;
aSig1 = extractFloat128Frac1( a );
@@ -5426,7 +5426,7 @@ float128 float128_div( float128 a, float128 b
STATUS_PARAM )
zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 );
mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 );
sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig0;
add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
}
@@ -5434,7 +5434,7 @@ float128 float128_div( float128 a, float128 b
STATUS_PARAM )
if ( ( zSig1 & 0x3FFF ) <= 4 ) {
mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 );
sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits64) rem1 < 0 ) {
+ while ( (int64_t) rem1 < 0 ) {
--zSig1;
add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
}
@@ -5455,9 +5455,9 @@ float128 float128_rem( float128 a, float128 b
STATUS_PARAM )
{
flag aSign, zSign;
int32 aExp, bExp, expDiff;
- bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
- bits64 allZero, alternateASig0, alternateASig1, sigMean1;
- sbits64 sigMean0;
+ uint64_t aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
+ uint64_t allZero, alternateASig0, alternateASig1, sigMean1;
+ int64_t sigMean0;
float128 z;
aSig1 = extractFloat128Frac1( a );
@@ -5539,15 +5539,15 @@ float128 float128_rem( float128 a, float128 b
STATUS_PARAM )
alternateASig1 = aSig1;
++q;
sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
- } while ( 0 <= (sbits64) aSig0 );
+ } while ( 0 <= (int64_t) aSig0 );
add128(
- aSig0, aSig1, alternateASig0, alternateASig1, (bits64 *)&sigMean0,
&sigMean1 );
+ aSig0, aSig1, alternateASig0, alternateASig1, (uint64_t *)&sigMean0,
&sigMean1 );
if ( ( sigMean0 < 0 )
|| ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {
aSig0 = alternateASig0;
aSig1 = alternateASig1;
}
- zSign = ( (sbits64) aSig0 < 0 );
+ zSign = ( (int64_t) aSig0 < 0 );
if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );
return
normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1
STATUS_VAR );
@@ -5564,8 +5564,8 @@ float128 float128_sqrt( float128 a STATUS_PARAM )
{
flag aSign;
int32 aExp, zExp;
- bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
- bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
+ uint64_t aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
+ uint64_t rem0, rem1, rem2, rem3, term0, term1, term2, term3;
float128 z;
aSig1 = extractFloat128Frac1( a );
@@ -5597,7 +5597,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM )
doubleZSig0 = zSig0<<1;
mul64To128( zSig0, zSig0, &term0, &term1 );
sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
+ while ( (int64_t) rem0 < 0 ) {
--zSig0;
doubleZSig0 -= 2;
add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
@@ -5609,7 +5609,7 @@ float128 float128_sqrt( float128 a STATUS_PARAM )
sub128( rem1, 0, term1, term2, &rem1, &rem2 );
mul64To128( zSig1, zSig1, &term2, &term3 );
sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits64) rem1 < 0 ) {
+ while ( (int64_t) rem1 < 0 ) {
--zSig1;
shortShift128Left( 0, zSig1, 1, &term2, &term3 );
term3 |= 1;
@@ -5647,7 +5647,7 @@ int float128_eq( float128 a, float128 b STATUS_PARAM )
( a.low == b.low )
&& ( ( a.high == b.high )
|| ( ( a.low == 0 )
- && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
+ && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
);
}
@@ -5676,7 +5676,7 @@ int float128_le( float128 a, float128 b STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low |
b.low )
== 0 );
}
return
@@ -5708,7 +5708,7 @@ int float128_lt( float128 a, float128 b STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low |
b.low )
!= 0 );
}
return
@@ -5739,7 +5739,7 @@ int float128_eq_signaling( float128 a, float128 b
STATUS_PARAM )
( a.low == b.low )
&& ( ( a.high == b.high )
|| ( ( a.low == 0 )
- && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
+ && ( (uint64_t) ( ( a.high | b.high )<<1 ) == 0 ) )
);
}
@@ -5771,7 +5771,7 @@ int float128_le_quiet( float128 a, float128 b
STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ || ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low |
b.low )
== 0 );
}
return
@@ -5807,7 +5807,7 @@ int float128_lt_quiet( float128 a, float128 b
STATUS_PARAM )
if ( aSign != bSign ) {
return
aSign
- && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ && ( ( ( (uint64_t) ( ( a.high | b.high )<<1 ) ) | a.low |
b.low )
!= 0 );
}
return
@@ -5965,7 +5965,7 @@ INLINE int float ## s ## _compare_internal( float ## s a,
float ## s b, \
int is_quiet STATUS_PARAM ) \
{ \
flag aSign, bSign; \
- bits ## s av, bv; \
+ uint ## s ## _t av, bv; \
a = float ## s ## _squash_input_denormal(a STATUS_VAR); \
b = float ## s ## _squash_input_denormal(b STATUS_VAR); \
\
@@ -5985,7 +5985,7 @@ INLINE int float ## s ## _compare_internal( float ## s a,
float ## s b, \
av = float ## s ## _val(a); \
bv = float ## s ## _val(b); \
if ( aSign != bSign ) { \
- if ( (bits ## s) ( ( av | bv )<<1 ) == 0 ) { \
+ if ( (uint ## s ## _t) ( ( av | bv )<<1 ) == 0 ) { \
/* zero case */ \
return float_relation_equal; \
} else { \
@@ -6062,7 +6062,7 @@ float32 float32_scalbn( float32 a, int n STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits32 aSig;
+ uint32_t aSig;
a = float32_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat32Frac( a );
@@ -6086,7 +6086,7 @@ float64 float64_scalbn( float64 a, int n STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits64 aSig;
+ uint64_t aSig;
a = float64_squash_input_denormal(a STATUS_VAR);
aSig = extractFloat64Frac( a );
@@ -6111,7 +6111,7 @@ floatx80 floatx80_scalbn( floatx80 a, int n STATUS_PARAM )
{
flag aSign;
int16 aExp;
- bits64 aSig;
+ uint64_t aSig;
aSig = extractFloatx80Frac( a );
aExp = extractFloatx80Exp( a );
@@ -6134,7 +6134,7 @@ float128 float128_scalbn( float128 a, int n STATUS_PARAM )
{
flag aSign;
int32 aExp;
- bits64 aSig0, aSig1;
+ uint64_t aSig0, aSig1;
aSig1 = extractFloat128Frac1( a );
aSig0 = extractFloat128Frac0( a );
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index 29492bc..5d05fa5 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -65,21 +65,6 @@ typedef signed int int32;
typedef uint64_t uint64;
typedef int64_t int64;
-/*----------------------------------------------------------------------------
-| Each of the following `typedef's defines a type that holds integers
-| of _exactly_ the number of bits specified. For instance, for most
-| implementation of C, `bits16' and `sbits16' should be `typedef'ed to
-| `unsigned short int' and `signed short int' (or `short int'), respectively.
-*----------------------------------------------------------------------------*/
-typedef uint8_t bits8;
-typedef int8_t sbits8;
-typedef uint16_t bits16;
-typedef int16_t sbits16;
-typedef uint32_t bits32;
-typedef int32_t sbits32;
-typedef uint64_t bits64;
-typedef int64_t sbits64;
-
#define LIT64( a ) a##LL
#define INLINE static inline
--
1.7.3.4
- [Qemu-devel] [PATCH v5 01/10] [RESEND] softfloat: Prepend QEMU-style header with derivation notice, Andreas Färber, 2011/03/06
- [Qemu-devel] [PATCH v5 02/10] softfloat: Resolve type mismatches between declaration and implementation, Andreas Färber, 2011/03/06
- [Qemu-devel] [PATCH v5 03/10] softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t,
Andreas Färber <=
- [Qemu-devel] [PATCH v5 04/10] softfloat: Drop [u]int16 types in favor of [u]int_fast16_t, Andreas Färber, 2011/03/06
- [Qemu-devel] [PATCH v5 05/10] softfloat: Use [u]int_fast16_t consistently, Andreas Färber, 2011/03/06
- [Qemu-devel] [PATCH v5 06/10] softfloat: Drop [u]int8 types in favor of int_fast8_t, Andreas Färber, 2011/03/06
- [Qemu-devel] [PATCH v5 07/10] softfloat: Drop [u]int32 types in favor of [u]int_fast32_t, Andreas Färber, 2011/03/06
- [Qemu-devel] [PATCH v5 08/10] softfloat: Use [u]int_fast32_t consistently, Andreas Färber, 2011/03/06
- [Qemu-devel] [PATCH v5 09/10] softfloat: Drop [u]int64 types in favor of [u]int_fast64_t, Andreas Färber, 2011/03/06
- [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently, Andreas Färber, 2011/03/06
- Re: [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently, Aurelien Jarno, 2011/03/07
- Re: [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently, Andreas Färber, 2011/03/07
- Re: [Qemu-devel] [PATCH v5 10/10] softfloat: Use [u]int_fast64_t consistently, Aurelien Jarno, 2011/03/08