Re: [Qemu-devel] [PATCH 0/2] ARM: fix VLD of one element to all lanes

[Aurelien Jarno]

On Tue, Mar 15, 2011 at 04:26:50PM +0000, Peter Maydell wrote:
> This patchset fixes various bugs in the implementation of the Neon
> instructions loading a single element to all lanes.
> 
> The primary bug is that VLD1's "single element to all lanes" form differs
> from those for VLD2, VLD3 and VLD4 in that bit 5 indicates whether the
> loaded element should be written to one or two Dregs, rather than being a
> register stride. (This is the issue addressed by Meego commit 6f3b4ee,
> although my choice of fix is different.)
> 
> We were also incorrectly UNDEFfing VLD4.32 with 16 byte alignment
> specifier, failing to UNDEF for invalid size and alignment combinations,
> and leaking a TCG temporary on the UNDEF code paths.
> 
> Tested via the usual random instruction set testing, and also with the
> valgrind 'neon64' test case.
> 
> Peter Maydell (2):
>   target-arm: Fix VLD of single element to all lanes
>   target-arm: Don't leak TCG temp for UNDEFs in Neon load/store space
> 
>  target-arm/translate.c |   92 
> ++++++++++++++++++++++++++++++++++--------------
>  1 files changed, 65 insertions(+), 27 deletions(-)
> 

Thanks, both applied.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net