[Qemu-devel] [Bug 757702] Re: Undefined instruction exception starts at offset 0x8 instead of 0x4

[Peter Maydell]

I can't reproduce this (either with current trunk or with qemu 0.14.0
release version). Also, if we were directing UNDEF exceptions to the SVC
entry point I think it would cause fairly obvious breakage of Linux
guests.

I'm going to attach the test program I used to confirm that we are
correctly directing the exception to the 0x4 vector:

./arm-softmmu/qemu-system-arm -kernel ~/linaro/qemu-misc-tests/undef-exc.axf  
-semihosting
Starting test
In undef vector

I'll also attach the binary, since it's only 2K and the source needs
armcc to build.

If you can provide a simple test program and qemu command line which
demonstrates the behaviour you think is incorrect I can investigate
further.

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https://bugs.launchpad.net/bugs/757702

Title:
  Undefined instruction exception starts at offset 0x8 instead of 0x4

Status in QEMU:
  New

Bug description:
  ARMv7a has lot of undefined instruction from its instruction opcode
  space. This undefined instructions are very useful for replacing
  sensitive non-priviledged instructions of guest operating systems
  (virtualization). The undefined instruction exception executes at
  <exception_base> + 0x4, where <exception_base> can be 0x0 or
  0xfff00000. Currently, in qemu 0.14.0 undefined instruction fault at
  0x8 offset instead of 0x4. This was not a problem with qemu 0.13.0,
  seems like this is a new bug. As as example, if we try to execute
  value "0xec019800" in qemu 0.14.0 then it should cause undefined
  exception at <exception_base>+0x4 since "0xec019800" is an undefined
  instruction.