[Qemu-devel] [Bug 757702] Re: Undefined instruction exception starts at offset 0x8 instead of 0x4

[Peter Maydell]

> ARMv7a has lot of undefined instruction from its instruction opcode space. 
> This undefined instructions
>are very useful for replacing sensitive non-priviledged instructions of guest 
>operating systems (virtualization). 

PS: please don't use arbitrary UNDEF instruction patterns for this (the one you 
quoted is in the STC instruction space  for example). There's an 
officially-defined "permanently UNDEF" space:
 cond 0111 1111 xxxx xxxx xxxx 1111 xxxx
available for this purpose, which will mean you don't have to worry about newer 
versions of the architecture allocating the UNDEF patterns you were using.

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https://bugs.launchpad.net/bugs/757702

Title:
  Undefined instruction exception starts at offset 0x8 instead of 0x4

Status in QEMU:
  New

Bug description:
  ARMv7a has lot of undefined instruction from its instruction opcode
  space. This undefined instructions are very useful for replacing
  sensitive non-priviledged instructions of guest operating systems
  (virtualization). The undefined instruction exception executes at
  <exception_base> + 0x4, where <exception_base> can be 0x0 or
  0xfff00000. Currently, in qemu 0.14.0 undefined instruction fault at
  0x8 offset instead of 0x4. This was not a problem with qemu 0.13.0,
  seems like this is a new bug. As as example, if we try to execute
  value "0xec019800" in qemu 0.14.0 then it should cause undefined
  exception at <exception_base>+0x4 since "0xec019800" is an undefined
  instruction.