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[Qemu-devel] [PATCH v2 19/19] target-mips: clear softfpu exception state
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From: |
Aurelien Jarno |
|
Subject: |
[Qemu-devel] [PATCH v2 19/19] target-mips: clear softfpu exception state for comparison instructions |
|
Date: |
Thu, 14 Apr 2011 01:11:14 +0200 |
MIPS FPU instructions should start with a clean softfpu status. This
is done for the most instructions, but not for comparison ones.
Signed-off-by: Aurelien Jarno <address@hidden>
---
target-mips/op_helper.c | 41 +++++++++++++++++++++++++----------------
1 files changed, 25 insertions(+), 16 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index b35a6d2..8cba535 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2874,7 +2874,9 @@ uint64_t helper_float_mulr_ps(uint64_t fdt0, uint64_t
fdt1)
#define FOP_COND_D(op, cond) \
void helper_cmp_d_ ## op (uint64_t fdt0, uint64_t fdt1, int cc) \
{ \
- int c = cond; \
+ int c; \
+ set_float_exception_flags(0, &env->active_fpu.fp_status); \
+ c = cond; \
update_fcr31(); \
if (c) \
SET_FP_COND(cc, env->active_fpu); \
@@ -2884,6 +2886,7 @@ void helper_cmp_d_ ## op (uint64_t fdt0, uint64_t fdt1,
int cc) \
void helper_cmpabs_d_ ## op (uint64_t fdt0, uint64_t fdt1, int cc) \
{ \
int c; \
+ set_float_exception_flags(0, &env->active_fpu.fp_status); \
fdt0 = float64_abs(fdt0); \
fdt1 = float64_abs(fdt1); \
c = cond; \
@@ -2918,7 +2921,9 @@ FOP_COND_D(ngt, float64_unordered(fdt1, fdt0,
&env->active_fpu.fp_status) || fl
#define FOP_COND_S(op, cond) \
void helper_cmp_s_ ## op (uint32_t fst0, uint32_t fst1, int cc) \
{ \
- int c = cond; \
+ int c; \
+ set_float_exception_flags(0, &env->active_fpu.fp_status); \
+ c = cond; \
update_fcr31(); \
if (c) \
SET_FP_COND(cc, env->active_fpu); \
@@ -2928,6 +2933,7 @@ void helper_cmp_s_ ## op (uint32_t fst0, uint32_t fst1,
int cc) \
void helper_cmpabs_s_ ## op (uint32_t fst0, uint32_t fst1, int cc) \
{ \
int c; \
+ set_float_exception_flags(0, &env->active_fpu.fp_status); \
fst0 = float32_abs(fst0); \
fst1 = float32_abs(fst1); \
c = cond; \
@@ -2962,13 +2968,15 @@ FOP_COND_S(ngt, float32_unordered(fst1, fst0,
&env->active_fpu.fp_status) || fl
#define FOP_COND_PS(op, condl, condh) \
void helper_cmp_ps_ ## op (uint64_t fdt0, uint64_t fdt1, int cc) \
{ \
- uint32_t fst0 = fdt0 & 0XFFFFFFFF; \
- uint32_t fsth0 = fdt0 >> 32; \
- uint32_t fst1 = fdt1 & 0XFFFFFFFF; \
- uint32_t fsth1 = fdt1 >> 32; \
- int cl = condl; \
- int ch = condh; \
- \
+ uint32_t fst0, fsth0, fst1, fsth1; \
+ int ch, cl; \
+ set_float_exception_flags(0, &env->active_fpu.fp_status); \
+ fst0 = fdt0 & 0XFFFFFFFF; \
+ fsth0 = fdt0 >> 32; \
+ fst1 = fdt1 & 0XFFFFFFFF; \
+ fsth1 = fdt1 >> 32; \
+ cl = condl; \
+ ch = condh; \
update_fcr31(); \
if (cl) \
SET_FP_COND(cc, env->active_fpu); \
@@ -2981,13 +2989,14 @@ void helper_cmp_ps_ ## op (uint64_t fdt0, uint64_t
fdt1, int cc) \
} \
void helper_cmpabs_ps_ ## op (uint64_t fdt0, uint64_t fdt1, int cc) \
{ \
- uint32_t fst0 = float32_abs(fdt0 & 0XFFFFFFFF); \
- uint32_t fsth0 = float32_abs(fdt0 >> 32); \
- uint32_t fst1 = float32_abs(fdt1 & 0XFFFFFFFF); \
- uint32_t fsth1 = float32_abs(fdt1 >> 32); \
- int cl = condl; \
- int ch = condh; \
- \
+ uint32_t fst0, fsth0, fst1, fsth1; \
+ int ch, cl; \
+ fst0 = float32_abs(fdt0 & 0XFFFFFFFF); \
+ fsth0 = float32_abs(fdt0 >> 32); \
+ fst1 = float32_abs(fdt1 & 0XFFFFFFFF); \
+ fsth1 = float32_abs(fdt1 >> 32); \
+ cl = condl; \
+ ch = condh; \
update_fcr31(); \
if (cl) \
SET_FP_COND(cc, env->active_fpu); \
--
1.7.2.3
- [Qemu-devel] [PATCH v2 00/19] softfloat and FPU fixes/improvements, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 04/19] target-i386: use float unions from cpu-all.h, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 05/19] target-i386: add floatx_{add, mul, sub} and use them, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 07/19] softfloat-native: add float*_unordered_quiet() functions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 13/19] softfloat: move float*_eq and float*_eq_quiet, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 08/19] target-alpha: use new float64_unordered_quiet() function, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 01/19] softfloat: use GCC builtins to count the leading zeros, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 03/19] target-i386: use CPU_LDoubleU instead of a private union, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 10/19] target-i386: fix CMPUNORDPS/D and CMPORDPS/D instructions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 19/19] target-mips: clear softfpu exception state for comparison instructions,
Aurelien Jarno <=
- [Qemu-devel] [PATCH v2 17/19] target-mips: don't hardcode softfloat exception bits, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 14/19] softfloat: improve description of comparison functions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 18/19] target-mips: fix c.ps.* instructions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 06/19] softfloat: add float*_unordered_{, quiet}() functions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 09/19] target-mips: use new float*_unordered*() functions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 12/19] softfloat: rename float*_eq_signaling() into float*_eq(), Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 15/19] target-ppc: fix SPE comparison functions, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 02/19] cpu-all.h: define CPU_LDoubleU, Aurelien Jarno, 2011/04/13
- [Qemu-devel] [PATCH v2 11/19] softfloat: rename float*_eq() into float*_eq_quiet(), Aurelien Jarno, 2011/04/13