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[Qemu-devel] [PATCH 33/33] target-alpha: Add high-resolution access to w
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 33/33] target-alpha: Add high-resolution access to wall clock and an alarm. |
Date: |
Thu, 28 Apr 2011 13:51:15 -0700 |
The alarm is a fully general one-shot time comparator, which will be
usable under Linux as a hrtimer source. It's much more flexible than
the RTC source available on real hardware.
The wall clock allows the guest access to the host timekeeping. Much
like the KVM wall clock source for other guests.
Both are accessed via the PALcode Cserve entry point.
Signed-off-by: Richard Henderson <address@hidden>
---
hw/alpha_typhoon.c | 22 ++++++++++++++++++++--
target-alpha/cpu.h | 4 ++++
target-alpha/helper.h | 4 ++++
target-alpha/op_helper.c | 15 +++++++++++++++
target-alpha/translate.c | 14 ++++++++++++++
5 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/hw/alpha_typhoon.c b/hw/alpha_typhoon.c
index fb47481..d7b878c 100644
--- a/hw/alpha_typhoon.c
+++ b/hw/alpha_typhoon.c
@@ -676,6 +676,16 @@ static void typhoon_set_timer_irq(void *opaque, int irq,
int level)
}
}
+static void typhoon_alarm_timer(void *opaque)
+{
+ TyphoonState *s = (TyphoonState *)((uintptr_t)opaque & ~3);
+ int cpu = (uintptr_t)opaque & 3;
+
+ /* Set the ITI bit for this cpu. */
+ s->cchip.misc |= 1 << (cpu + 4);
+ cpu_interrupt(s->cchip.cpu[cpu], CPU_INTERRUPT_TIMER);
+}
+
PCIBus *typhoon_init(qemu_irq *p_isa_irq, qemu_irq *p_rtc_irq,
CPUState *cpus[3], pci_map_irq_fn sys_map_irq)
{
@@ -685,14 +695,22 @@ PCIBus *typhoon_init(qemu_irq *p_isa_irq, qemu_irq
*p_rtc_irq,
TyphoonState *s;
PCIBus *b;
qemu_irq *irqs;
- int region;
+ int i, region;
dev = qdev_create(NULL, "typhoon-pcihost");
p = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
s = container_of(p, TyphoonState, host);
/* Remember the CPUs so that we can deliver interrupts to them. */
- memcpy(s->cchip.cpu, cpus, 4 * sizeof(CPUState *));
+ for (i = 0; i < 4; i++) {
+ CPUState *env = cpus[i];
+ s->cchip.cpu[i] = env;
+ if (env) {
+ env->alarm_timer = qemu_new_timer_ns(rtc_clock,
+ typhoon_alarm_timer,
+ (void *)((uintptr_t)s + i));
+ }
+ }
irqs = qemu_allocate_irqs(typhoon_set_irq, s, 64);
*p_isa_irq = irqs[55];
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 30ecf2d..b974cc3 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -266,6 +266,10 @@ struct CPUAlphaState {
uint64_t shadow[8];
uint64_t scratch[24];
+ /* This alarm doesn't exist in real hardware; we wish it did. */
+ struct QEMUTimer *alarm_timer;
+ uint64_t alarm_expire;
+
#if TARGET_LONG_BITS > HOST_LONG_BITS
/* temporary fixed-point registers
* used to emulate 64 bits target on 32 bits hosts
diff --git a/target-alpha/helper.h b/target-alpha/helper.h
index c352c24..b693cee 100644
--- a/target-alpha/helper.h
+++ b/target-alpha/helper.h
@@ -113,7 +113,11 @@ DEF_HELPER_2(stq_c_phys, i64, i64, i64)
DEF_HELPER_FLAGS_0(tbia, TCG_CALL_CONST, void)
DEF_HELPER_FLAGS_1(tbis, TCG_CALL_CONST, void, i64)
+
DEF_HELPER_1(halt, void, i64);
+
+DEF_HELPER_FLAGS_0(get_time, TCG_CALL_CONST, i64)
+DEF_HELPER_FLAGS_1(set_alarm, TCG_CALL_CONST, void, i64)
#endif
#include "def-helper.h"
diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c
index 80656f5..c37fb5f 100644
--- a/target-alpha/op_helper.c
+++ b/target-alpha/op_helper.c
@@ -1225,6 +1225,21 @@ void helper_halt(uint64_t restart)
qemu_system_shutdown_request();
}
}
+
+uint64_t helper_get_time(void)
+{
+ return qemu_get_clock_ns(rtc_clock);
+}
+
+void helper_set_alarm(uint64_t expire)
+{
+ if (expire) {
+ env->alarm_expire = expire;
+ qemu_mod_timer(env->alarm_timer, expire);
+ } else {
+ qemu_del_timer(env->alarm_timer);
+ }
+}
#endif
/*****************************************************************************/
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 9edcd74..f34c53e 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -1594,6 +1594,9 @@ static int cpu_pr_data(int pr)
return offsetof(CPUAlphaState, shadow[pr - 32]);
case 40 ... 63:
return offsetof(CPUAlphaState, scratch[pr - 40]);
+
+ case 251:
+ return offsetof(CPUAlphaState, alarm_expire);
}
return 0;
}
@@ -1608,6 +1611,12 @@ static void gen_mfpr(int ra, int regno)
return;
}
+ if (regno == 250) {
+ /* WALL_TIME */
+ gen_helper_get_time(cpu_ir[ra]);
+ return;
+ }
+
/* The basic registers are data only, and unknown registers
are read-zero, write-ignore. */
if (data == 0) {
@@ -1654,6 +1663,11 @@ static ExitStatus gen_mtpr(DisasContext *ctx, int rb,
int regno)
gen_helper_halt(tmp);
return EXIT_PC_STALE;
+ case 251:
+ /* ALARM */
+ gen_helper_set_alarm(tmp);
+ break;
+
default:
/* The basic registers are data only, and unknown registers
are read-zero, write-ignore. */
--
1.7.4.4
- [Qemu-devel] [PATCH 24/33] target-alpha: Remap PIO space for 43-bit KSEG for EV6., (continued)
- [Qemu-devel] [PATCH 24/33] target-alpha: Remap PIO space for 43-bit KSEG for EV6., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 25/33] target-alpha: Trap for unassigned and unaligned addresses., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 26/33] target-alpha: Include the PCC_OFS in the RPCC return value., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 27/33] target-alpha: Use a fixed frequency for the RPCC in system mode., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 28/33] target-alpha: Implement TLB flush primitives., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 31/33] target-alpha: Implement WAIT IPR., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 32/33] target-alpha: Implement HALT IPR., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 29/33] target-alpha: Add custom PALcode image for CLIPPER emulation., Richard Henderson, 2011/04/28
- [Qemu-devel] [PATCH 33/33] target-alpha: Add high-resolution access to wall clock and an alarm.,
Richard Henderson <=
- [Qemu-devel] [PATCH 30/33] target-alpha: Add CLIPPER emulation., Richard Henderson, 2011/04/28
- Re: [Qemu-devel] [PATCH 00/33] Alpha system emulation, v3, Paolo Bonzini, 2011/04/29