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Re: [Qemu-devel] [RFC 01/28] target-xtensa: add target stubs
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] [RFC 01/28] target-xtensa: add target stubs |
Date: |
Wed, 4 May 2011 22:51:27 +0300 |
On Wed, May 4, 2011 at 3:59 AM, Max Filippov <address@hidden> wrote:
> Signed-off-by: Max Filippov <address@hidden>
> ---
> Makefile.target | 2 +
> arch_init.c | 2 +
> arch_init.h | 1 +
> cpu-exec.c | 10 +++++
> elf.h | 2 +
> hw/xtensa_pic.c | 11 ++++++
> target-xtensa/cpu.h | 84
> +++++++++++++++++++++++++++++++++++++++++++++
> target-xtensa/exec.h | 55 +++++++++++++++++++++++++++++
> target-xtensa/helper.c | 74 +++++++++++++++++++++++++++++++++++++++
> target-xtensa/machine.c | 38 ++++++++++++++++++++
> target-xtensa/op_helper.c | 51 +++++++++++++++++++++++++++
> target-xtensa/translate.c | 67 +++++++++++++++++++++++++++++++++++
> 12 files changed, 397 insertions(+), 0 deletions(-)
> create mode 100644 hw/xtensa_pic.c
> create mode 100644 target-xtensa/cpu.h
> create mode 100644 target-xtensa/exec.h
> create mode 100644 target-xtensa/helper.c
> create mode 100644 target-xtensa/machine.c
> create mode 100644 target-xtensa/op_helper.c
> create mode 100644 target-xtensa/translate.c
>
> diff --git a/Makefile.target b/Makefile.target
> index 21f864a..7e7afd2 100644
> --- a/Makefile.target
> +++ b/Makefile.target
> @@ -366,6 +366,8 @@ obj-s390x-y = s390-virtio-bus.o s390-virtio.o
>
> obj-alpha-y = alpha_palcode.o
>
> +obj-xtensa-y += xtensa_pic.o
> +
> main.o: QEMU_CFLAGS+=$(GPROF_CFLAGS)
>
> monitor.o: hmp-commands.h qmp-commands.h
> diff --git a/arch_init.c b/arch_init.c
> index 0c09f91..c1f0005 100644
> --- a/arch_init.c
> +++ b/arch_init.c
> @@ -78,6 +78,8 @@ const char arch_config_name[] = CONFIG_QEMU_CONFDIR
> "/target-" TARGET_ARCH ".con
> #define QEMU_ARCH QEMU_ARCH_SH4
> #elif defined(TARGET_SPARC)
> #define QEMU_ARCH QEMU_ARCH_SPARC
> +#elif defined(TARGET_XTENSA)
> +#define QEMU_ARCH QEMU_ARCH_XTENSA
> #endif
>
> const uint32_t arch_type = QEMU_ARCH;
> diff --git a/arch_init.h b/arch_init.h
> index 86ebc14..61ad347 100644
> --- a/arch_init.h
> +++ b/arch_init.h
> @@ -17,6 +17,7 @@ enum {
> QEMU_ARCH_S390X = 512,
> QEMU_ARCH_SH4 = 1024,
> QEMU_ARCH_SPARC = 2048,
> + QEMU_ARCH_XTENSA = 4096,
> };
>
> extern const uint32_t arch_type;
> diff --git a/cpu-exec.c b/cpu-exec.c
> index 395cd8c..a692daf 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -275,6 +275,7 @@ int cpu_exec(CPUState *env1)
> #elif defined(TARGET_SH4)
> #elif defined(TARGET_CRIS)
> #elif defined(TARGET_S390X)
> +#elif defined(TARGET_XTENSA)
> /* XXXXX */
> #else
> #error unsupported target CPU
> @@ -348,6 +349,8 @@ int cpu_exec(CPUState *env1)
> do_interrupt(0);
> #elif defined(TARGET_S390X)
> do_interrupt(env);
> +#elif defined(TARGET_XTENSA)
> + do_interrupt(env);
> #endif
> env->exception_index = -1;
> #endif
> @@ -568,6 +571,12 @@ int cpu_exec(CPUState *env1)
> do_interrupt(env);
> next_tb = 0;
> }
> +#elif defined(TARGET_XTENSA)
> + if (interrupt_request & CPU_INTERRUPT_HARD) {
> + env->exception_index = EXC_IRQ;
> + do_interrupt(env);
> + next_tb = 0;
> + }
> #endif
> /* Don't use the cached interupt_request value,
> do_interrupt may have updated the EXITTB flag. */
> @@ -696,6 +705,7 @@ int cpu_exec(CPUState *env1)
> #elif defined(TARGET_ALPHA)
> #elif defined(TARGET_CRIS)
> #elif defined(TARGET_S390X)
> +#elif defined(TARGET_XTENSA)
> /* XXXXX */
> #else
> #error unsupported target CPU
> diff --git a/elf.h b/elf.h
> index ffcac7e..2e05d34 100644
> --- a/elf.h
> +++ b/elf.h
> @@ -125,6 +125,8 @@ typedef int64_t Elf64_Sxword;
> #define EM_MICROBLAZE 189
> #define EM_MICROBLAZE_OLD 0xBAAB
>
> +#define EM_XTENSA 94 /* Tensilica Xtensa */
> +
> /* This is the info that is needed to parse the dynamic section of the file
> */
> #define DT_NULL 0
> #define DT_NEEDED 1
> diff --git a/hw/xtensa_pic.c b/hw/xtensa_pic.c
> new file mode 100644
> index 0000000..5ff1697
> --- /dev/null
> +++ b/hw/xtensa_pic.c
> @@ -0,0 +1,11 @@
> +#include "hw.h"
> +#include "pc.h"
> +
> +/* Stub functions for hardware that doesn't exist. */
> +void pic_info(Monitor *mon)
> +{
> +}
> +
> +void irq_info(Monitor *mon)
> +{
> +}
> diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
> new file mode 100644
> index 0000000..ef6881a
> --- /dev/null
> +++ b/target-xtensa/cpu.h
> @@ -0,0 +1,84 @@
> +/*
> + * Copyright (c) 2011, Max Filippov, Motorola Solutions, Inc.
> + * All rights reserved.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are
> met:
> + * * Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * * Neither the name of the Motorola Solutions nor the
> + * names of its contributors may be used to endorse or promote products
> + * derived from this software without specific prior written
> permission.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
> IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
> SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
> AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
> THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#ifndef CPU_XTENSA_H
> +#define CPU_XTENSA_H
> +
> +#define TARGET_LONG_BITS 32
> +#define ELF_MACHINE EM_XTENSA
> +
> +#define CPUState struct CPUXtensaState
> +
> +#include "config.h"
> +#include "qemu-common.h"
> +#include "cpu-defs.h"
> +
> +#define TARGET_HAS_ICE 1
> +
> +#define NB_MMU_MODES 2
> +
> +#define TARGET_PHYS_ADDR_SPACE_BITS 32
> +#define TARGET_VIRT_ADDR_SPACE_BITS 32
> +#define TARGET_PAGE_BITS 12
> +
> +typedef struct CPUXtensaState {
> + uint32_t regs[16];
> + uint32_t pc;
> + uint32_t sregs[256];
> +
> + CPU_COMMON
> +} CPUXtensaState;
> +
> +#define cpu_init cpu_xtensa_init
> +#define cpu_exec cpu_xtensa_exec
> +#define cpu_gen_code cpu_xtensa_gen_code
> +#define cpu_signal_handler cpu_xtensa_signal_handler
> +#define cpu_list xtensa_cpu_list
> +
> +CPUXtensaState *cpu_xtensa_init(const char *cpu_model);
> +void xtensa_translate_init(void);
> +int cpu_xtensa_exec(CPUXtensaState *s);
> +void do_interrupt(CPUXtensaState *s);
> +int cpu_xtensa_signal_handler(int host_signum, void *pinfo, void *puc);
> +void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf);
> +
> +static inline int cpu_mmu_index(CPUState *env)
> +{
> + return 0;
> +}
> +
> +static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
> + target_ulong *cs_base, int *flags)
> +{
> + *pc = env->pc;
> + *cs_base = 0;
> + *flags = 0;
> +}
> +
> +#include "cpu-all.h"
> +
> +#endif
> diff --git a/target-xtensa/exec.h b/target-xtensa/exec.h
> new file mode 100644
> index 0000000..5a0cb6f
> --- /dev/null
> +++ b/target-xtensa/exec.h
> @@ -0,0 +1,55 @@
> +/*
> + * Copyright (c) 2011, Max Filippov, Motorola Solutions, Inc.
> + * All rights reserved.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are
> met:
> + * * Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * * Neither the name of the Motorola Solutions nor the
> + * names of its contributors may be used to endorse or promote products
> + * derived from this software without specific prior written
> permission.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
> IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
> SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
> AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
> THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#include "config.h"
> +#include "dyngen-exec.h"
> +
> +register struct CPUXtensaState *env asm(AREG0);
> +
> +#include "cpu.h"
> +#include "exec-all.h"
> +
> +static inline int cpu_has_work(CPUState *env)
> +{
> + return 1;
> +}
> +
> +static inline int cpu_halted(CPUState *env)
> +{
> + return 0;
> +}
> +
> +#if !defined(CONFIG_USER_ONLY)
> +#include "softmmu_exec.h"
> +#endif
> +
> +void raise_exception(int);
> +
> +static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
> +{
> + env->pc = tb->pc;
> +}
> diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
> new file mode 100644
> index 0000000..6b6e17b
> --- /dev/null
> +++ b/target-xtensa/helper.c
> @@ -0,0 +1,74 @@
> +/*
> + * Copyright (c) 2011, Max Filippov, Motorola Solutions, Inc.
> + * All rights reserved.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are
> met:
> + * * Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * * Neither the name of the Motorola Solutions nor the
> + * names of its contributors may be used to endorse or promote products
> + * derived from this software without specific prior written
> permission.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
> IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
> SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
> AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
> THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +#include "cpu.h"
> +#include "exec-all.h"
> +#include "gdbstub.h"
> +#include "qemu-common.h"
> +#include "host-utils.h"
> +#if !defined(CONFIG_USER_ONLY)
> +#include "hw/loader.h"
> +#endif
> +
> +void cpu_reset(CPUXtensaState *env)
> +{
> + env->pc = 0;
> +}
> +
> +CPUXtensaState *cpu_xtensa_init(const char *cpu_model)
> +{
> + static int tcg_inited;
> + CPUXtensaState *env;
> +
> + env = qemu_mallocz(sizeof(*env));
> + cpu_exec_init(env);
> +
> + if (!tcg_inited) {
> + tcg_inited = 1;
> + xtensa_translate_init();
> + }
> +
> + cpu_reset(env);
CPU init should not call reset anymore, this is done elsewhere nowadays.
- [Qemu-devel] [RFC 22/28] target-xtensa: implement extended L32R, (continued)
- [Qemu-devel] [RFC 22/28] target-xtensa: implement extended L32R, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 23/28] target-xtensa: implement unaligned exception option, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 24/28] target-xtensa: implement SIMCALL, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 25/28] target-xtensa: implement interrupt option, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 26/28] target-xtensa: implement accurate window check, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 27/28] target-xtensa: implement CPENABLE and PRID SRs, Max Filippov, 2011/05/03
- [Qemu-devel] [RFC 28/28] target-xtensa: implement relocatable vectors, Max Filippov, 2011/05/03
- Re: [Qemu-devel] [RFC 01/28] target-xtensa: add target stubs, Max Filippov, 2011/05/04
- Re: [Qemu-devel] [RFC 01/28] target-xtensa: add target stubs,
Blue Swirl <=