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Re: [Qemu-devel] [RFC 19/28] target-xtensa: implement RST2 group (32 bit
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From: |
Max Filippov |
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Subject: |
Re: [Qemu-devel] [RFC 19/28] target-xtensa: implement RST2 group (32 bit mul/div/rem) |
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Date: |
Thu, 5 May 2011 12:27:44 +0400 |
>> case 2: /*RST2*/
>> - TBD();
>> + if (_OP2 >= 12) {
>> + HAS_OPTION(XTENSA_OPTION_32_BIT_IDIV);
>> + int label = gen_new_label();
>> + tcg_gen_brcondi_i32(TCG_COND_NE, cpu_R[RRR_T], 0, label);
>> + gen_exception_cause(dc, INTEGER_DIVIE_BY_ZERO_CAUSE);
>
> DIVIE?
Oops (: Looks like I overuse ^n.
Thanks.
-- Max
- [Qemu-devel] [RFC 15/28] target-xtensa: big endian support, (continued)
[Qemu-devel] [RFC 19/28] target-xtensa: implement RST2 group (32 bit mul/div/rem), Max Filippov, 2011/05/03
[Qemu-devel] [RFC 20/28] target-xtensa: implement windowed registers, Max Filippov, 2011/05/03
[Qemu-devel] [RFC 21/28] target-xtensa: implement loop option, Max Filippov, 2011/05/03
[Qemu-devel] [RFC 22/28] target-xtensa: implement extended L32R, Max Filippov, 2011/05/03
[Qemu-devel] [RFC 23/28] target-xtensa: implement unaligned exception option, Max Filippov, 2011/05/03
[Qemu-devel] [RFC 24/28] target-xtensa: implement SIMCALL, Max Filippov, 2011/05/03