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[Qemu-devel] [PATCH 24/35] target-alpha: Trap for unassigned and unalign
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 24/35] target-alpha: Trap for unassigned and unaligned addresses. |
Date: |
Mon, 9 May 2011 14:34:38 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
exec-all.h | 2 +-
exec.c | 12 ++++++------
target-alpha/cpu.h | 6 +++++-
target-alpha/op_helper.c | 26 ++++++++++++++++++++++++++
4 files changed, 38 insertions(+), 8 deletions(-)
diff --git a/exec-all.h b/exec-all.h
index 7c2d29f..6d3ae77 100644
--- a/exec-all.h
+++ b/exec-all.h
@@ -322,7 +322,7 @@ static inline tb_page_addr_t get_page_addr_code(CPUState
*env1, target_ulong add
}
pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK;
if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
-#if defined(TARGET_SPARC) || defined(TARGET_MIPS)
+#if defined(TARGET_ALPHA) || defined(TARGET_MIPS) || defined(TARGET_SPARC)
do_unassigned_access(addr, 0, 1, 0, 4);
#else
cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x"
TARGET_FMT_lx "\n", addr);
diff --git a/exec.c b/exec.c
index 0b8ab5b..8627500 100644
--- a/exec.c
+++ b/exec.c
@@ -3112,7 +3112,7 @@ uint32_t unassigned_mem_readb(void *opaque,
target_phys_addr_t addr)
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
#endif
-#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
+#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) ||
defined(TARGET_MICROBLAZE)
do_unassigned_access(addr, 0, 0, 0, 1);
#endif
return 0;
@@ -3123,7 +3123,7 @@ uint32_t unassigned_mem_readw(void *opaque,
target_phys_addr_t addr)
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
#endif
-#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
+#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) ||
defined(TARGET_MICROBLAZE)
do_unassigned_access(addr, 0, 0, 0, 2);
#endif
return 0;
@@ -3134,7 +3134,7 @@ uint32_t unassigned_mem_readl(void *opaque,
target_phys_addr_t addr)
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
#endif
-#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
+#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) ||
defined(TARGET_MICROBLAZE)
do_unassigned_access(addr, 0, 0, 0, 4);
#endif
return 0;
@@ -3145,7 +3145,7 @@ void unassigned_mem_writeb(void *opaque,
target_phys_addr_t addr, uint32_t val)
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
#endif
-#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
+#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) ||
defined(TARGET_MICROBLAZE)
do_unassigned_access(addr, 1, 0, 0, 1);
#endif
}
@@ -3155,7 +3155,7 @@ void unassigned_mem_writew(void *opaque,
target_phys_addr_t addr, uint32_t val)
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
#endif
-#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
+#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) ||
defined(TARGET_MICROBLAZE)
do_unassigned_access(addr, 1, 0, 0, 2);
#endif
}
@@ -3165,7 +3165,7 @@ void unassigned_mem_writel(void *opaque,
target_phys_addr_t addr, uint32_t val)
#ifdef DEBUG_UNASSIGNED
printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
#endif
-#if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
+#if defined(TARGET_ALPHA) || defined(TARGET_SPARC) ||
defined(TARGET_MICROBLAZE)
do_unassigned_access(addr, 1, 0, 0, 4);
#endif
}
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index fc0cd61..d26a870 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -435,7 +435,11 @@ void do_interrupt (CPUState *env);
uint64_t cpu_alpha_load_fpcr (CPUState *env);
void cpu_alpha_store_fpcr (CPUState *env, uint64_t val);
-extern void swap_shadow_regs(CPUState *env);
+#ifndef CONFIG_USER_ONLY
+void swap_shadow_regs(CPUState *env);
+extern QEMU_NORETURN void do_unassigned_access(target_phys_addr_t addr,
+ int, int, int, int);
+#endif
/* Bits in TB->FLAGS that control how translation is processed. */
enum {
diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c
index 03b5091..91ef90a 100644
--- a/target-alpha/op_helper.c
+++ b/target-alpha/op_helper.c
@@ -1265,7 +1265,33 @@ uint64_t helper_stq_c_phys(uint64_t p, uint64_t v)
return ret;
}
+static void QEMU_NORETURN do_unaligned_access(target_ulong addr, int is_write,
+ int is_user, void *retaddr)
+{
+ uint64_t pc;
+ uint32_t insn;
+
+ do_restore_state(retaddr);
+
+ pc = env->pc;
+ insn = ldl_code(pc);
+
+ env->trap_arg0 = addr;
+ env->trap_arg1 = insn >> 26; /* opcode */
+ env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
+ helper_excp(EXCP_UNALIGN, 0);
+}
+
+void QEMU_NORETURN do_unassigned_access(target_phys_addr_t addr, int is_write,
+ int is_exec, int unused, int size)
+{
+ env->trap_arg0 = addr;
+ env->trap_arg1 = is_write;
+ dynamic_excp(EXCP_MCHK, 0);
+}
+
#define MMUSUFFIX _mmu
+#define ALIGNED_ONLY
#define SHIFT 0
#include "softmmu_template.h"
--
1.7.4.4
- [Qemu-devel] [PATCH 08/35] target-alpha: Rationalize internal processor registers., (continued)
- [Qemu-devel] [PATCH 08/35] target-alpha: Rationalize internal processor registers., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 15/35] target-alpha: Implement do_interrupt for system mode., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 16/35] target-alpha: Swap shadow registers moving to/from PALmode., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 17/35] target-alpha: Add various symbolic constants., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 18/35] target-alpha: Use kernel mmu_idx for pal_mode., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 20/35] target-alpha: Disable interrupts properly., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 21/35] target-alpha: Implement more CALL_PAL values inline., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 19/35] target-alpha: All ISA checks to use TB->FLAGS., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 22/35] target-alpha: Implement cpu_alpha_handle_mmu_fault for system mode., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 23/35] target-alpha: Remap PIO space for 43-bit KSEG for EV6., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 24/35] target-alpha: Trap for unassigned and unaligned addresses.,
Richard Henderson <=
- [Qemu-devel] [PATCH 25/35] target-alpha: Include the PCC_OFS in the RPCC return value., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 26/35] target-alpha: Use a fixed frequency for the RPCC in system mode., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 27/35] target-alpha: Implement TLB flush primitives., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 30/35] target-alpha: Implement WAIT IPR., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 33/35] target-alpha: Properly select the VGA controler to use., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 29/35] target-alpha: Add CLIPPER emulation., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 34/35] target-alpha: Enable PCI IDE, Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 35/35] target-alpha: Add ps2 keyboard., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 31/35] target-alpha: Implement HALT IPR., Richard Henderson, 2011/05/09
- [Qemu-devel] [PATCH 32/35] target-alpha: Add high-resolution access to wall clock and an alarm., Richard Henderson, 2011/05/09