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Re: [Qemu-devel] TCG: AREG0 removal planning
From: |
Blue Swirl |
Subject: |
Re: [Qemu-devel] TCG: AREG0 removal planning |
Date: |
Mon, 16 May 2011 22:18:32 +0300 |
On Mon, May 16, 2011 at 7:16 PM, Paul Brook <address@hidden> wrote:
>> > For changes to
>> > the TCG side we want to consider how we can provide useful aliasing
>> > information, rather than a naive replacement of TCG_AREG0 with a
>> > variable.
>>
>> What aliasing information?
>
> Aliasing of cpu state accesses between tcg_global_mem_new_* variables,
> qemu_ld/st ops, and helper functions.
Structures describing such aliases must be somewhat complex. Those
descriptors should then be attached to these variables, ops and
functions. Checking the structures during translation may be simpler
but I'd expect some kind of list or bit map search to happen for each
access to these variables etc.
Maybe you have a better design in mind, but I'm not sure this way
would bring performance. The translator can't be too complex.
Re: [Qemu-devel] TCG: AREG0 removal planning, Stefan Weil, 2011/05/10
Re: [Qemu-devel] TCG: AREG0 removal planning, Richard Henderson, 2011/05/10