qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [RFC] Memory API


From: Jan Kiszka
Subject: Re: [Qemu-devel] [RFC] Memory API
Date: Thu, 19 May 2011 20:11:39 +0200
User-agent: Mozilla/5.0 (X11; U; Linux i686 (x86_64); de; rv:1.8.1.12) Gecko/20080226 SUSE/2.0.0.12-1.1 Thunderbird/2.0.0.12 Mnenhy/0.7.5.666

On 2011-05-19 19:39, Gleb Natapov wrote:
> On Thu, May 19, 2011 at 03:37:58PM +0200, Jan Kiszka wrote:
>> On 2011-05-19 15:36, Anthony Liguori wrote:
>>> On 05/18/2011 02:40 PM, Jan Kiszka wrote:
>>>> On 2011-05-18 15:12, Avi Kivity wrote:
>>>>> void cpu_register_memory_region(MemoryRegion *mr, target_phys_addr_t
>>>>> addr);
>>>>
>>>> OK, let's allow overlapping, but make it explicit:
>>>>
>>>> void cpu_register_memory_region_overlap(MemoryRegion *mr,
>>>>                                          target_phys_addr_t addr,
>>>>                                          int priority);
>>>
>>> The device doesn't actually know how overlapping is handled.  This is
>>> based on the bus hierarchy.
>>
>> Devices don't register their regions, buses do.
>>
> Today PCI device may register region that overlaps with any other
> registered memory region without even knowing it. Guest can write any
> RAM address into PCI BAR and this RAM address will be come mmio are. More
> interesting is what happens when guest reprogram PCI BAR to other address
> - the RAM that was at the previous address just disappears. Obviously
>   this is crazy behaviour, but the question is how do we want to handle
> it? One option is to disallow such overlapping registration, another is
> to restore RAM mapping after PCI BAR is reprogrammed. If we chose second
> one the PCI will not know that _overlap() should be called.

BARs may overlap with other BARs or with RAM. That's well-known, so PCI
bridged need to register their regions with the _overlap variant
unconditionally. In contrast to the current PhysPageDesc mechanism, the
new region management will not cause any harm to overlapping regions so
that they can "recover" when the overlap is gone.

> 
> Another example may be APIC region and PCI. They overlap, but neither
> CPU nor PCI knows about it.

And they do not need to. The APIC regions will be managed by the per-CPU
region management, reusing the tool box we need for all bridges. It will
register the APIC page with a priority higher than the default one, thus
overriding everything that comes from the host bridge. I think that
reflects pretty well real machine behaviour.

Jan

Attachment: signature.asc
Description: OpenPGP digital signature


reply via email to

[Prev in Thread] Current Thread [Next in Thread]