On Sun, May 22, 2011 at 10:37:48AM +0300, Avi Kivity wrote:
> On 05/20/2011 02:57 PM, Gleb Natapov wrote:
> >On Fri, May 20, 2011 at 11:59:58AM +0300, Avi Kivity wrote:
> >> On 05/19/2011 07:27 PM, Gleb Natapov wrote:
> >> >> Think of how a window manager folds windows with priorities onto a
> >> >> flat framebuffer.
> >> >>
> >> >> You do a depth-first walk of the tree. For each child list, you
> >> >> iterate it from the lowest to highest priority, allowing later
> >> >> subregions override earlier subregions.
> >> >>
> >> >I do not think that window manager is a good analogy. Window can
> >> >overlap with only its siblings. In our memory tree each final node may
> >> >overlap with any other node in the tree.
> >> >
> >>
> >> Transparent windows.
> >>
> >No, still not that. Think about child windows that resides outside of its
> >parent windows on screen. In our memory region terms think about PCI BAR
> >is registered to overlap with RAM at address 0x1000 for instance. PCI
> >BAR memory region and RAM memory region are on very different branches
> >of the global tree.
>
> Right. But what's the problem with that?
>
None, unless you want to make PCI BAR visible at address 0x1000 (like what
will happen today) the case above.
> Which one takes precedence is determined by the priorities of the
> RAM subregion vs. the PCI bus subregion.
>
Yes, and that is why PCI subsystem or platform code can't directly uses
memory API to register PCI memory region/RAM memory region respectively,
because they wouldn't know what priorities to specify. Only chipset code
knows, so the RAM/PCI memory registration should go through chipset
code,