[Qemu-devel] [PATCH 14/18] TCG/PPC: use TCG_REG_CALL_STACK instead of TCG_REG_R1

[Blue Swirl]

Use TCG_REG_CALL_STACK instead of TCG_REG_R1 etc. for consistency.

Signed-off-by: Blue Swirl <address@hidden>
---
 tcg/ppc/tcg-target.c   |   17 ++++++++++-------
 tcg/ppc64/tcg-target.c |   16 +++++++++-------
 2 files changed, 19 insertions(+), 14 deletions(-)

diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
index dde4e18..729061f 100644
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -921,15 +921,16 @@ static void tcg_target_qemu_prologue (TCGContext *s)
     }
 #endif
     tcg_out32 (s, MFSPR | RT (0) | LR);
-    tcg_out32 (s, STWU | RS (1) | RA (1) | (-frame_size & 0xffff));
+    tcg_out32 (s, STWU | RS (REG_CALL_STACK) | RA (REG_CALL_STACK)
+               | (-frame_size & 0xffff));
     for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
         tcg_out32 (s, (STW
                        | RS (tcg_target_callee_save_regs[i])
-                       | RA (1)
+                       | RA (REG_CALL_STACK)
                        | (i * 4 + LINKAGE_AREA_SIZE +
TCG_STATIC_CALL_ARGS_SIZE)
                        )
             );
-    tcg_out32 (s, STW | RS (0) | RA (1) | (frame_size + LR_OFFSET));
+    tcg_out32 (s, STW | RS (0) | RA (REG_CALL_STACK) | (frame_size +
LR_OFFSET));

 #ifdef CONFIG_USE_GUEST_BASE
     if (GUEST_BASE) {
@@ -946,13 +947,15 @@ static void tcg_target_qemu_prologue (TCGContext *s)
     for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
         tcg_out32 (s, (LWZ
                        | RT (tcg_target_callee_save_regs[i])
-                       | RA (1)
+                       | RA (REG_CALL_STACK)
                        | (i * 4 + LINKAGE_AREA_SIZE +
TCG_STATIC_CALL_ARGS_SIZE)
                        )
             );
-    tcg_out32 (s, LWZ | RT (0) | RA (1) | (frame_size + LR_OFFSET));
+    tcg_out32 (s, LWZ | RT (0) | RA (REG_CALL_STACK)
+               | (frame_size + LR_OFFSET));
     tcg_out32 (s, MTSPR | RS (0) | LR);
-    tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
+    tcg_out32 (s, ADDI | RT (REG_CALL_STACK) | RA (REG_CALL_STACK)
+               | frame_size);
     tcg_out32 (s, BCLR | BO_ALWAYS);
 }

@@ -1910,7 +1913,7 @@ static void tcg_target_init(TCGContext *s)

     tcg_regset_clear(s->reserved_regs);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0);
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1);
+    tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
 #ifndef _CALL_DARWIN
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2);
 #endif
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 3218438..d48cf7e 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -887,15 +887,16 @@ static void tcg_target_qemu_prologue (TCGContext *s)

     /* Prologue */
     tcg_out32 (s, MFSPR | RT (0) | LR);
-    tcg_out32 (s, STDU | RS (1) | RA (1) | (-frame_size & 0xffff));
+    tcg_out32 (s, STDU | RS (REG_CALL_STACK) | RA (REG_CALL_STACK)
+               | (-frame_size & 0xffff));
     for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
         tcg_out32 (s, (STD
                        | RS (tcg_target_callee_save_regs[i])
-                       | RA (1)
+                       | RA (REG_CALL_STACK)
                        | (i * 8 + 48 + TCG_STATIC_CALL_ARGS_SIZE)
                        )
             );
-    tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 16));
+    tcg_out32 (s, STD | RS (0) | RA (REG_CALL_STACK) | (frame_size + 16));

 #ifdef CONFIG_USE_GUEST_BASE
     if (GUEST_BASE) {
@@ -914,13 +915,14 @@ static void tcg_target_qemu_prologue (TCGContext *s)
     for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
         tcg_out32 (s, (LD
                        | RT (tcg_target_callee_save_regs[i])
-                       | RA (1)
+                       | RA (REG_CALL_STACK)
                        | (i * 8 + 48 + TCG_STATIC_CALL_ARGS_SIZE)
                        )
             );
-    tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 16));
+    tcg_out32 (s, LD | RT (0) | RA (REG_CALL_STACK) | (frame_size + 16));
     tcg_out32 (s, MTSPR | RS (0) | LR);
-    tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
+    tcg_out32 (s, ADDI | RT (REG_CALL_STACK) | RA (REG_CALL_STACK)
+               | frame_size);
     tcg_out32 (s, BCLR | BO_ALWAYS);
 }

@@ -1689,7 +1691,7 @@ static void tcg_target_init (TCGContext *s)

     tcg_regset_clear (s->reserved_regs);
     tcg_regset_set_reg (s->reserved_regs, TCG_REG_R0);
-    tcg_regset_set_reg (s->reserved_regs, TCG_REG_R1);
+    tcg_regset_set_reg (s->reserved_regs, TCG_REG_CALL_STACK);
 #ifndef __APPLE__
     tcg_regset_set_reg (s->reserved_regs, TCG_REG_R2);
 #endif
-- 
1.6.2.4