|
From: | Ben Vogler |
Subject: | [Qemu-devel] Benchmarking activities |
Date: | Mon, 27 Jun 2011 09:02:57 +1000 |
Hi QEMU devel team, I work for Toyota Technical Centre -
I have seen examples of QEMU
processor cores being wrapped in SystemC and used in OSCI based virtual systems
– is this the general approach, or is there other/better ways of going about
using QEMU not as an emulator (such as VMware), but as a simulator? -
Is there full backwards
compatibility between versions of QEMU? -
I have been looking but could not
find a complete list of processor core models supported by QEMU. I have seen
there are processors from Sparc, ARM, MIPS, but are there any core models from
NEC, or Renesas in particular? Would you please be able to point me in the
right direction? The rest of my questions are based on the assumption that
QEMU IP will be used in a virtual system simulation, rather than emulation. -
Is co-simulation possible? For
example, connecting an engine model running in Dymola to the QEMU (processor
model) based virtual system simulator. -
Are there any inbuilt data
tracing features? For example, hardware signal tracing, register monitoring
etc. Thanks for your time. Regards,
Phone: +61 3 9501 5226 Confidential - do not forward this email. P Please
consider the environment before printing this e-mail |
[Prev in Thread] | Current Thread | [Next in Thread] |