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[Qemu-devel] [PATCH v2 3/8] SPARC64: Implement stfa/stdfa/stqfa instrcut
From: |
Tsuneo Saito |
Subject: |
[Qemu-devel] [PATCH v2 3/8] SPARC64: Implement stfa/stdfa/stqfa instrcutions properly |
Date: |
Thu, 14 Jul 2011 18:41:38 +0900 |
This patch implements sparcv9 stfa/stdfa/stqfa instructions
with non block-store ASIs.
Signed-off-by: Tsuneo Saito <address@hidden>
---
target-sparc/op_helper.c | 15 +++++++++++----
target-sparc/translate.c | 2 --
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index a75ac4f..fe71829 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -3396,6 +3396,7 @@ void helper_stf_asi(target_ulong addr, int asi, int size,
int rd)
{
unsigned int i;
target_ulong val = 0;
+ CPU_DoubleU u;
helper_check_align(addr, 3);
addr = asi_address_mask(env, asi, addr);
@@ -3440,16 +3441,22 @@ void helper_stf_asi(target_ulong addr, int asi, int
size, int rd)
switch(size) {
default:
case 4:
- val = *((uint32_t *)&env->fpr[rd]);
+ helper_st_asi(addr, *(uint32_t *)&env->fpr[rd], asi, size);
break;
case 8:
- val = *((int64_t *)&DT0);
+ u.l.upper = *(uint32_t *)&env->fpr[rd++];
+ u.l.lower = *(uint32_t *)&env->fpr[rd++];
+ helper_st_asi(addr, u.ll, asi, size);
break;
case 16:
- // XXX
+ u.l.upper = *(uint32_t *)&env->fpr[rd++];
+ u.l.lower = *(uint32_t *)&env->fpr[rd++];
+ helper_st_asi(addr, u.ll, asi, 8);
+ u.l.upper = *(uint32_t *)&env->fpr[rd++];
+ u.l.lower = *(uint32_t *)&env->fpr[rd++];
+ helper_st_asi(addr + 8, u.ll, asi, 8);
break;
}
- helper_st_asi(addr, val, asi, size);
}
target_ulong helper_cas_asi(target_ulong addr, target_ulong val1,
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 1e7e68d..a5a8eaf 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -4742,12 +4742,10 @@ static void disas_sparc_insn(DisasContext * dc)
r_const = tcg_const_i32(7);
gen_helper_check_align(cpu_addr, r_const);
tcg_temp_free_i32(r_const);
- gen_op_load_fpr_QT0(QFPREG(rd));
gen_stf_asi(cpu_addr, insn, 16, QFPREG(rd));
}
break;
case 0x37: /* V9 stdfa */
- gen_op_load_fpr_DT0(DFPREG(rd));
gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd));
break;
case 0x3c: /* V9 casa */
--
1.7.5.4
- [Qemu-devel] [PATCH v2 0/8] SPARC64: Implement sparcv9 ldfa/stfa instructions, Tsuneo Saito, 2011/07/14
- [Qemu-devel] [PATCH v2 1/8] SPARC64: Implement ldfa/lddfa/ldqfa instructions properly, Tsuneo Saito, 2011/07/14
- [Qemu-devel] [PATCH v2 2/8] SPARC64: fp_disabled checks on ldfa/lddfa/ldqfa, Tsuneo Saito, 2011/07/14
- [Qemu-devel] [PATCH v2 3/8] SPARC64: Implement stfa/stdfa/stqfa instrcutions properly,
Tsuneo Saito <=
- [Qemu-devel] [PATCH v2 4/8] SPARC64: fp_disabled checks on stfa/stdfa/stqfa, Tsuneo Saito, 2011/07/14
- [Qemu-devel] [PATCH v2 6/8] SPARC64: Add UA2007 ASI_BLK_AIU[PS]L? ASIs for stfa, Tsuneo Saito, 2011/07/14
- [Qemu-devel] [PATCH v2 5/8] SPARC64: Add UA2007 ASI_BLK_AIU[PS]L? ASIs for ldfa, Tsuneo Saito, 2011/07/14
- [Qemu-devel] [PATCH v2 7/8] SPARC64: Add JPS1 ASI_BLK_AIU[PS]L ASIs for ldfa and stfa, Tsuneo Saito, 2011/07/14
- [Qemu-devel] [PATCH v2 8/8] SPARC64: C99 comment fix for block-transfer ASIs, Tsuneo Saito, 2011/07/14