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[Qemu-devel] [PATCH 4/7] SPARC64: split cpu_get_phys_page_debug() from c
From: |
Tsuneo Saito |
Subject: |
[Qemu-devel] [PATCH 4/7] SPARC64: split cpu_get_phys_page_debug() from cpu_get_phys_page_nofault() |
Date: |
Fri, 22 Jul 2011 00:16:30 +0900 |
This patch makes cpu_get_phys_page_debug() independent from
cpu_get_phys_page_nofault() in advance of implementing nonfaulting load.
This also modifies cpu_get_phys_page_nofault() to be compiled only on
TARGET_SPARC64 because it is not required on SPARC32.
Signed-off-by: Tsuneo Saito <address@hidden>
---
target-sparc/cpu.h | 2 ++
target-sparc/helper.c | 15 ++++++++++++++-
2 files changed, 16 insertions(+), 1 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 348858e..f4eeff5 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -541,10 +541,12 @@ static inline int tlb_compare_context(const SparcTLBEntry
*tlb,
#if !defined(CONFIG_USER_ONLY)
void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr,
int is_write, int is_exec, int is_asi, int size);
+#if defined(TARGET_SPARC64)
target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr,
int mmu_idx);
#endif
+#endif
int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
#define cpu_init cpu_sparc_init
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 9acbcae..cb8d706 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -746,6 +746,7 @@ static int cpu_sparc_get_phys_page(CPUState *env,
target_phys_addr_t *phys,
mmu_idx, &page_size);
}
+#if defined(TARGET_SPARC64)
target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr,
int mmu_idx)
{
@@ -760,10 +761,22 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUState
*env, target_ulong addr,
return -1;
return phys_addr;
}
+#endif
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
- return cpu_get_phys_page_nofault(env, addr, cpu_mmu_index(env));
+ target_phys_addr_t phys_addr;
+ int mmu_idx = cpu_mmu_index(env);
+
+ if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 2, mmu_idx) != 0) {
+ if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 0, mmu_idx) != 0) {
+ return -1;
+ }
+ }
+ if (cpu_get_physical_page_desc(phys_addr) == IO_MEM_UNASSIGNED) {
+ return -1;
+ }
+ return phys_addr;
}
#endif
--
1.7.5.4
- [Qemu-devel] [PATCH 0/7] SPARC64: fix nonfaulting load on softmmu, Tsuneo Saito, 2011/07/21
- [Qemu-devel] [PATCH 2/7] SPARC64: SFSR cleanup and fix, Tsuneo Saito, 2011/07/21
- [Qemu-devel] [PATCH 6/7] SPARC64: implement MMU miss traps on nonfaulting loads, Tsuneo Saito, 2011/07/21
- [Qemu-devel] [PATCH 7/7] SPARC64: implement addtional MMU faults related to nonfaulting load, Tsuneo Saito, 2011/07/21
- [Qemu-devel] [PATCH 4/7] SPARC64: split cpu_get_phys_page_debug() from cpu_get_phys_page_nofault(),
Tsuneo Saito <=
- [Qemu-devel] [PATCH 5/7] SPARC64: fix fault status overwritten on nonfaulting load, Tsuneo Saito, 2011/07/21
- [Qemu-devel] [PATCH 3/7] SPARC64: introduce a convenience function for getting physical addresses, Tsuneo Saito, 2011/07/21
- [Qemu-devel] [PATCH 1/7] SPARC64: TTE bits cleanup, Tsuneo Saito, 2011/07/21
- Re: [Qemu-devel] [PATCH 0/7] SPARC64: fix nonfaulting load on softmmu, Blue Swirl, 2011/07/21