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Re: [Qemu-devel] [RFC][PATCH 0/21] QEMU Object Model


From: Paolo Bonzini
Subject: Re: [Qemu-devel] [RFC][PATCH 0/21] QEMU Object Model
Date: Thu, 28 Jul 2011 16:41:24 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:5.0) Gecko/20110707 Thunderbird/5.0

On 07/28/2011 04:03 PM, Anthony Liguori wrote:
No doubt about that. :) I'd put a lot more hope into Goldfish though.

What's unclear to me about the Goldfish enumerator is whether it should
be filled out through interaction with hardware devices or via some
other mechanism.

In many ways, it's similar to ACPI and a Device Tree.  In both of those
cases, firmware actually is responsible for constructing those tables.

Yes, it is a flat device tree.

Since it supports hotplug (at least in theory, the Android emulator predates qdev so it doesn't support it), I would say it is more similar to PCI configuration space. The difference is that IRQ numbers and MMIO base addresses are handed out by hardware (by a piece of the SoC) rather than by the firmware.

So yes, the hardware would have some kind of bus to talk to the devices and arbitrate hotplug/hotunplug. The only peculiarity being that the bus enumerator hardcodes itself in the list it exposes, in addition to the devices on the bus.

But that still means that the devices have two views:

1) the enumerator's view is either "this is my name, my MMIO base, my IRQ base" or "I need 4k of MMIO and 1 IRQ line, please tell me where/which are those", depending on the device;

2) the PIC's view is "please bring this IRQ line up/down" (the device says which line, since the enumerator can assign those dynamically).

The PIC's view is more complicated than a Pin, and more similar to ISA.

Paolo



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