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[Qemu-devel] [PATCH 0/2] pl061: convert to VMState, add GPIOAMSEL regist


From: Peter Maydell
Subject: [Qemu-devel] [PATCH 0/2] pl061: convert to VMState, add GPIOAMSEL register
Date: Thu, 4 Aug 2011 00:04:26 +0100

The main aim of this patchset is to add the GPIOAMSEL register
to the PL061 GPIO module. I've converted the PL061 to VMState format
first, though, because I didn't really feel like adding a new
field/version to an old-style save/load format device...

Notes: the old vmstate format for pl061 is 32 bits per register on the
wire despite being only 8 bits in the struct. I opted to widen the
struct member fields to 32 bits as the least unpalatable of the various
possible ways to deal with this in VMState format.

The GPIOAMSEL register is TI/Stellaris specific, but we leave it
in the ARM PL061 to match all the other Stellaris specific registers.
It's also only present on newer Stellaris chips, but common init code
typically tries to write to it anyway. Since it doesn't do anything in
the model there doesn't seem any point trying to distinguish between
revisions where it reads-as-written and revisions where it is
unimplemented and will RAZ/WI.

These patches plus Engin's one for the RCC2 register are enough
for the example binary from http://www.keil.com/download/docs/345.asp
to boot and at least get as far as drawing to the screen (although
there may still be some issues with networking).


Peter Maydell (2):
  hw/pl061: Convert to VMState
  hw/pl061.c: Support GPIOAMSEL register

 hw/pl061.c |  181 ++++++++++++++++++++++++++++-------------------------------
 1 files changed, 86 insertions(+), 95 deletions(-)

-- 
1.7.4.1




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