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[Qemu-devel] [PATCH 010/111] m68k: define m680x0 CPUs and features
From: |
Bryce Lanham |
Subject: |
[Qemu-devel] [PATCH 010/111] m68k: define m680x0 CPUs and features |
Date: |
Wed, 17 Aug 2011 15:46:15 -0500 |
From: Laurent Vivier <address@hidden>
This patch defines four new Motorola 680x0 family CPUs:
- M68K_CPUID_M68000,
- M68K_CPUID_M68020,
- M68K_CPUID_M68040,
- M68K_CPUID_M68060
And six new features:
- M68K_FEATURE_SCALED_INDEX, scaled address index register
- M68K_FEATURE_LONG_MULDIV, 32bit multiply/divide
- M68K_FEATURE_QUAD_MULDIV, 64bit multiply/divide
- M68K_FEATURE_BCCL, long conditional branches
- M68K_FEATURE_BITFIELD, bit field instructions
- M68K_FEATURE_FPU, FPU instructions
Following patches implement them...
Signed-off-by: Andreas Schwab <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/cpu.h | 13 ++++++++++---
target-m68k/helper.c | 36 +++++++++++++++++++++++++++++++++++-
2 files changed, 45 insertions(+), 4 deletions(-)
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 0667f82..0f216c2 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -182,6 +182,7 @@ void do_m68k_semihosting(CPUM68KState *env, int nr);
ISA revisions mentioned. */
enum m68k_features {
+ M68K_FEATURE_M68000,
M68K_FEATURE_CF_ISA_A,
M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */
M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
@@ -192,7 +193,13 @@ enum m68k_features {
M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */
M68K_FEATURE_USP, /* User Stack Pointer. (ISA A+, B or C). */
M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */
- M68K_FEATURE_WORD_INDEX /* word sized address index registers. */
+ M68K_FEATURE_WORD_INDEX, /* word sized address index registers. */
+ M68K_FEATURE_SCALED_INDEX, /* scaled address index registers. */
+ M68K_FEATURE_LONG_MULDIV, /* 32 bit multiply/divide. */
+ M68K_FEATURE_QUAD_MULDIV, /* 64 bit multiply/divide. */
+ M68K_FEATURE_BCCL, /* Long conditional branches. */
+ M68K_FEATURE_BITFIELD, /* Bit field insns. */
+ M68K_FEATURE_FPU
};
static inline int m68k_feature(CPUM68KState *env, int feature)
@@ -205,8 +212,8 @@ void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf);
void register_m68k_insns (CPUM68KState *env);
#ifdef CONFIG_USER_ONLY
-/* Linux uses 8k pages. */
-#define TARGET_PAGE_BITS 13
+/* Linux uses 4k pages. */
+#define TARGET_PAGE_BITS 12
#else
/* Smallest TLB entry size is 1k. */
#define TARGET_PAGE_BITS 10
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 8a8b4f8..f226e4a 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -31,6 +31,10 @@
#define SIGNBIT (1u << 31)
enum m68k_cpuid {
+ M68K_CPUID_M68000,
+ M68K_CPUID_M68020,
+ M68K_CPUID_M68040,
+ M68K_CPUID_M68060,
M68K_CPUID_M5206,
M68K_CPUID_M5208,
M68K_CPUID_CFV4E,
@@ -45,6 +49,10 @@ struct m68k_def_t {
};
static m68k_def_t m68k_cpu_defs[] = {
+ {"m68000", M68K_CPUID_M68000},
+ {"m68020", M68K_CPUID_M68020},
+ {"m68040", M68K_CPUID_M68040},
+ {"m68060", M68K_CPUID_M68060},
{"m5206", M68K_CPUID_M5206},
{"m5208", M68K_CPUID_M5208},
{"cfv4e", M68K_CPUID_CFV4E},
@@ -110,12 +118,30 @@ static int cpu_m68k_set_model(CPUM68KState *env, const
char *name)
return -1;
switch (def->id) {
+ case M68K_CPUID_M68020:
+ case M68K_CPUID_M68040:
+ m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
+ case M68K_CPUID_M68060:
+ m68k_set_feature(env, M68K_FEATURE_BRAL);
+ m68k_set_feature(env, M68K_FEATURE_BCCL);
+ m68k_set_feature(env, M68K_FEATURE_BITFIELD);
+ m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
+ m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
+ m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
+ m68k_set_feature(env, M68K_FEATURE_FPU);
+ case M68K_CPUID_M68000:
+ m68k_set_feature(env, M68K_FEATURE_M68000);
+ m68k_set_feature(env, M68K_FEATURE_USP);
+ m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
+ break;
case M68K_CPUID_M5206:
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
+ m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
break;
case M68K_CPUID_M5208:
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
+ m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
m68k_set_feature(env, M68K_FEATURE_BRAL);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
m68k_set_feature(env, M68K_FEATURE_USP);
@@ -123,16 +149,19 @@ static int cpu_m68k_set_model(CPUM68KState *env, const
char *name)
case M68K_CPUID_CFV4E:
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
+ m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
m68k_set_feature(env, M68K_FEATURE_BRAL);
m68k_set_feature(env, M68K_FEATURE_CF_FPU);
m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
m68k_set_feature(env, M68K_FEATURE_USP);
break;
case M68K_CPUID_ANY:
+ m68k_set_feature(env, M68K_FEATURE_M68000);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
m68k_set_feature(env, M68K_FEATURE_BRAL);
+ m68k_set_feature(env, M68K_FEATURE_BCCL);
m68k_set_feature(env, M68K_FEATURE_CF_FPU);
/* MAC and EMAC are mututally exclusive, so pick EMAC.
It's mostly backwards compatible. */
@@ -140,12 +169,17 @@ static int cpu_m68k_set_model(CPUM68KState *env, const
char *name)
m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
m68k_set_feature(env, M68K_FEATURE_USP);
m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
+ m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
+ m68k_set_feature(env, M68K_FEATURE_BITFIELD);
+ m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
+ m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
break;
}
register_m68k_insns(env);
- if (m68k_feature (env, M68K_FEATURE_CF_FPU)) {
+ if (m68k_feature (env, M68K_FEATURE_CF_FPU) ||
+ m68k_feature (env, M68K_FEATURE_FPU)) {
gdb_register_coprocessor(env, fpu_gdb_get_reg, fpu_gdb_set_reg,
11, "cf-fp.xml", 18);
}
--
1.7.2.3
- [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 001/111] linux-user: Signals processing is not thread-safe., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 002/111] linux-user: add qemu-wrapper, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 003/111] linux-user: define default cpu model in configure instead of linux-user/main.c, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 004/111] linux-user: specify the cpu model during configure, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 006/111] linux-user: define new environment variables, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 007/111] linux-user: define a script to set binfmt using debian flavored tools, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 008/111] linux-user: define default cpu model in configure instead of linux-user/main.c, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 009/111] m68k: add tcg_gen_debug_insn_start(), Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 005/111] linux-user,m68k: display default cpu, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 010/111] m68k: define m680x0 CPUs and features,
Bryce Lanham <=
- [Qemu-devel] [PATCH 011/111] m68k: add missing accessing modes for some instructions., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 013/111] m68k: add Scc instruction with memory operand., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 012/111] m68k: add Motorola 680x0 family common instructions., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 015/111] m68k: modify movem instruction to manage word, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 016/111] m68k: add 64bit divide., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 014/111] m68k: add DBcc instruction., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 018/111] m68k: add word data size for suba/adda, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 017/111] m68k: add 32bit and 64bit multiply, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 019/111] m68k: add fpu, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 020/111] m68k: add "byte", "word" and memory shift, Bryce Lanham, 2011/08/17