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[Qemu-devel] [PATCH 053/111] m68k: for bitfield opcodes, correct operand


From: Bryce Lanham
Subject: [Qemu-devel] [PATCH 053/111] m68k: for bitfield opcodes, correct operands corruption
Date: Wed, 17 Aug 2011 15:46:58 -0500

From: Laurent Vivier <address@hidden>

This patch doesn't modify values inside operand "shift" and "offset",
instead copy them in a TCG temp.

Signed-off-by: Laurent Vivier <address@hidden>
---
 target-m68k/translate.c |    7 ++++---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 4f2a5ee..e0c6fa3 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -2693,7 +2693,8 @@ static void bitfield_param(uint16_t ext, TCGv *offset, 
TCGv *width, TCGv *mask)
     /* offset */
 
     if (ext & 0x0800) {
-        *offset = DREG(ext, 6);
+        *offset = tcg_temp_new_i32();
+        tcg_gen_mov_i32(*offset, DREG(ext, 6));
     } else {
         *offset = tcg_temp_new_i32();
         tcg_gen_movi_i32(*offset, (ext >> 6) & 31);
@@ -2702,8 +2703,8 @@ static void bitfield_param(uint16_t ext, TCGv *offset, 
TCGv *width, TCGv *mask)
     /* width */
 
     if (ext & 0x0020) {
-        *width = DREG(ext, 0);
-        tcg_gen_subi_i32(*width, *width, 1);
+        *width = tcg_temp_new_i32();
+        tcg_gen_subi_i32(*width, DREG(ext, 0), 1);
         tcg_gen_andi_i32(*width, *width, 31);
         tcg_gen_addi_i32(*width, *width, 1);
     } else {
-- 
1.7.2.3




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