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[Qemu-devel] [PATCH 072/111] m68k: add flog10
From: |
Bryce Lanham |
Subject: |
[Qemu-devel] [PATCH 072/111] m68k: add flog10 |
Date: |
Wed, 17 Aug 2011 15:47:17 -0500 |
From: Laurent Vivier <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
---
fpu/softfloat.h | 1 +
target-m68k/helper.c | 23 ++++++++++++++++++++++-
target-m68k/helpers.h | 1 +
target-m68k/translate.c | 3 +++
4 files changed, 27 insertions(+), 1 deletions(-)
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index f6d5fce..9ff6b4d 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -534,6 +534,7 @@ INLINE int floatx80_is_any_nan(floatx80 a)
#define floatx80_infinity make_floatx80(0x7fff, 0x8000000000000000LL)
#define floatx80_e make_floatx80(0x4000, 0xadf85458a2bb4a9aULL)
#define floatx80_log2e make_floatx80(0x3fff, 0xb8aa3b295c17f0bcULL)
+#define floatx80_10 make_floatx80(0x4002, 0xa000000000000000ULL)
/*----------------------------------------------------------------------------
| The pattern for a default generated extended double-precision NaN.
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 14a6ae6..f6e446a 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -1016,7 +1016,7 @@ static const floatx80 fpu_rom[128] = {
[0x30] = floatx80_ln2, /* ln(2) */
[0x31] = { .high = 0x4000, .low = 0x935d8dddaaa8ac17ULL }, /* ln(10) */
[0x32] = floatx80_one, /* 10^0 */
- [0x33] = { .high = 0x4002, .low = 0xa000000000000000ULL }, /* 10^1 */
+ [0x33] = floatx80_10, /* 10^1 */
[0x34] = { .high = 0x4005, .low = 0xc800000000000000ULL }, /* 10^2 */
[0x35] = { .high = 0x400c, .low = 0x9c40000000000000ULL }, /* 10^4 */
[0x36] = { .high = 0x4019, .low = 0xbebc200000000000ULL }, /* 10^8 */
@@ -1284,6 +1284,27 @@ void HELPER(ln_FP0)(CPUState *env)
floatx80_to_FP0(env, res);
}
+void HELPER(log10_FP0)(CPUState *env)
+{
+ float64 f, log2, log210;
+ floatx80 res;
+
+ /* log10(x) = log2(x) / log2(10) */
+
+ DBG_FPU("log10_FP0(%Lg)\n", LDOUBLE(FP0_to_floatx80(env)));
+ f = floatx80_to_float64(FP0_to_floatx80(env), &env->fp_status);
+
+ log2 = float64_log2(f, &env->fp_status);
+ log210 = float64_log2(floatx80_to_float64(floatx80_10, &env->fp_status),
+ &env->fp_status);
+ res = floatx80_div(float64_to_floatx80(log2, &env->fp_status),
+ float64_to_floatx80(log210, &env->fp_status),
+ &env->fp_status);
+ DBG_FPU(" = %Lg\n", LDOUBLE(res));
+
+ floatx80_to_FP0(env, res);
+}
+
void HELPER(exp_FP0)(CPUState *env)
{
floatx80 f;
diff --git a/target-m68k/helpers.h b/target-m68k/helpers.h
index 53ab1a9..138b4a4 100644
--- a/target-m68k/helpers.h
+++ b/target-m68k/helpers.h
@@ -67,6 +67,7 @@ DEF_HELPER_1(itrunc_FP0, void, env)
DEF_HELPER_1(sqrt_FP0, void, env)
DEF_HELPER_1(exp_FP0, void, env)
DEF_HELPER_1(ln_FP0, void, env)
+DEF_HELPER_1(log10_FP0, void, env)
DEF_HELPER_1(abs_FP0, void, env)
DEF_HELPER_1(chs_FP0, void, env)
DEF_HELPER_1(getexp_FP0, void, env)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 5591873..1196508 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3647,6 +3647,9 @@ DISAS_INSN(fpu)
case 0x14: /* flogn */
gen_helper_ln_FP0(cpu_env);
break;
+ case 0x15: /* flog10 */
+ gen_helper_log10_FP0(cpu_env);
+ break;
case 0x18: case 0x58: case 0x5c: /* fabs */
gen_helper_abs_FP0(cpu_env);
break;
--
1.7.2.3
- [Qemu-devel] [PATCH 051/111] m68k: correct divs.w and divu.w, (continued)
- [Qemu-devel] [PATCH 051/111] m68k: correct divs.w and divu.w, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 071/111] m68k: correct cmpa comparison datatype, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 061/111] m68k: remove useless file m68k-qreg.h, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 059/111] m68k: add m68030 definition, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 034/111] m68k: correct typo on f64_to_i32() return type., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 052/111] m68k: correct flags with negl, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 038/111] m68k: add EA support for negx, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 056/111] m68k-linux-user: add '--enable-emulop', Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 080/111] m68k: add fcos instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 064/111] m68k: more tests, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 072/111] m68k: add flog10,
Bryce Lanham <=
- [Qemu-devel] [PATCH 021/111] m68k: add "byte", "word" and memory rotate., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 078/111] m68k: add ftan instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 032/111] m68k: add linkl instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 036/111] m68k: correct neg condition code flags computation, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 024/111] m68k: add cas, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 028/111] m68k: allow fpu to manage double data type., Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 077/111] m68k: add facos instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 026/111] m68k: define fcntl constants, Bryce Lanham, 2011/08/17
- Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions, Rob Landley, 2011/08/20