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[Qemu-devel] [PATCH 105/111] m68k: add fsinh instruction
From: |
Bryce Lanham |
Subject: |
[Qemu-devel] [PATCH 105/111] m68k: add fsinh instruction |
Date: |
Wed, 17 Aug 2011 15:54:10 -0500 |
From: Laurent Vivier <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/helper.c | 15 +++++++++++++++
target-m68k/helpers.h | 1 +
target-m68k/translate.c | 3 +++
3 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index 5d34901..fc1b560 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -1331,6 +1331,21 @@ void HELPER(iround_FP0)(CPUState *env)
floatx80_to_FP0(env, res);
}
+void HELPER(sinh_FP0)(CPUState *env)
+{
+ floatx80 res;
+ long double val;
+
+ res = FP0_to_floatx80(env);
+ val = floatx80_to_ldouble(res);
+
+ DBG_FPUH("sinh_FP0 %Lg", val);
+ val = sinhl(val);
+ DBG_FPU(" = %Lg", val);
+ res = ldouble_to_floatx80(val);
+ floatx80_to_FP0(env, res);
+}
+
void HELPER(itrunc_FP0)(CPUState *env)
{
floatx80 res;
diff --git a/target-m68k/helpers.h b/target-m68k/helpers.h
index 154c183..e77b9b7 100644
--- a/target-m68k/helpers.h
+++ b/target-m68k/helpers.h
@@ -63,6 +63,7 @@ DEF_HELPER_4(fmovem, void, env, i32, i32, i32)
DEF_HELPER_2(set_fpcr, void, env, i32)
DEF_HELPER_2(const_FP0, void, env, i32)
DEF_HELPER_1(iround_FP0, void, env)
+DEF_HELPER_1(sinh_FP0, void, env)
DEF_HELPER_1(itrunc_FP0, void, env)
DEF_HELPER_1(sqrt_FP0, void, env)
DEF_HELPER_1(atan_FP0, void, env)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index e714eb4..c43bfe8 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3727,6 +3727,9 @@ DISAS_INSN(fpu)
gen_helper_iround_FP0(cpu_env);
round = 0;
break;
+ case 2: /* fsinh */
+ gen_helper_sinh_FP0(cpu_env);
+ break;
case 3: /* fintrz */
gen_helper_itrunc_FP0(cpu_env);
round = 0;
--
1.7.2.3
- [Qemu-devel] [PATCH 104/111] m68k: add fsincos instruction, (continued)
- [Qemu-devel] [PATCH 104/111] m68k: add fsincos instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 106/111] m68k: add ftanh instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 111/111] m68k: move from sr can use effective addresse on m68k, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 109/111] m68k: first draft of q800 emulation (not working), Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 107/111] m68k: add flognp1 instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 108/111] m68k: add fatanh instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 102/111] m68k: add fcosh instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 110/111] m68k: add movec instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 103/111] m68k: add fasin instruction, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 101/111] m68k: correctly load signed word into floating point register, Bryce Lanham, 2011/08/17
- [Qemu-devel] [PATCH 105/111] m68k: add fsinh instruction,
Bryce Lanham <=