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Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions


From: Michael Roth
Subject: Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions
Date: Thu, 18 Aug 2011 11:05:20 -0500
User-agent: Mozilla/5.0 (X11; Linux i686 on x86_64; rv:6.0) Gecko/20110812 Thunderbird/6.0

On 08/17/2011 06:30 PM, Bryce Lanham wrote:
Ugh, I'm sorry about that. This is why I should test before using
unfamiliar tools. Someone suggested using git format-patch/git
send-email instead of a big patch.


That's definitely preferred actually, but you should look at breaking this into multiple logical/self-contained series for easier review/testing.

Apologies,
Bryce Lanham

On Wed, Aug 17, 2011 at 5:35 PM, Anthony Liguori<address@hidden>  wrote:
On 08/17/2011 03:46 PM, Bryce Lanham wrote:

These patches greatly expand Motorola 68k emulation within qemu, and are
what I used as a basis for my
Google Summer of Code project to add NeXT hardware support to QEMU.

Please don't crap flood the list with a series of 100 patches.

Split things into logical chunks such that a series can be reasonably
reviewed and applied.

Regards,

Anthony Liguori


Bryce Lanham

Alexander Paramonov (1):
   linux-user: Signals processing is not thread-safe.

Andreas Schwab (3):
   m68k: add cas
   m68k: define fcntl constants
   m68k: add DBcc instruction.

Laurent Vivier (106):
   linux-user: add qemu-wrapper
   linux-user: define default cpu model in configure instead of
     linux-user/main.c
   linux-user: specify the cpu model during configure
   linux-user,m68k: display default cpu
   linux-user: define new environment variables
   linux-user: define a script to set binfmt using debian flavored tools
   linux-user: define default cpu model in configure instead of
     linux-user/main.c
   m68k: add tcg_gen_debug_insn_start()
   m68k: define m680x0 CPUs and features
   m68k: add missing accessing modes for some instructions.
   m68k: add Motorola 680x0 family common instructions.
   m68k: add Scc instruction with memory operand.
   m68k: add DBcc instruction.
   m68k: modify movem instruction to manage word
   m68k: add 64bit divide.
   m68k: add 32bit and 64bit multiply
   m68k: add word data size for suba/adda
   m68k: add fpu
   m68k: add "byte", "word" and memory shift
   m68k: add "byte", "word" and memory rotate.
   m68k: add bitfield_mem, bitfield_reg
   m68k: add variable offset/width to bitfield_reg/bitfield_mem
   m68k: add cas
   m68k: allow fpu to manage double data type.
   m68k: allow fpu to manage double data type with fmove to<ea>
   m68k: add FScc instruction
   m68k: add single data type to gen_ea
   m68k: add linkl instruction
   m68k: Add fmovecr
   m68k: correct typo on f64_to_i32() return type.
   m68k: improve CC_OP_LOGIC
   m68k: correct neg condition code flags computation
   Correct invalid use of "const void *" with "const uint8_t *"
   m68k: add EA support for negx
   m68k: add abcd instruction
   m68k: add sbcd instruction
   mm68k: add nbcd instruction
   m68k: set X flag according size of operand     Set X flag correctly
     for addsub, arith_im, addsubq.
   m68k: on 0 bit shift, don't update X flag
   m68k: improve addx instructions     Add (byte, word) opsize     Add
     memory access
   m68k: improve subx,negx instructions     Add (byte, word) opsize
     Add memory access (subx)
   m68k: improve asl/asr     evaluate correclty the missing V flag
   m68k: use read_imm1() when it is possible
   m68k: correct shift side effect for roxrl and roxll
   m68k: asl/asr, clear C flag if shift count is 0
   m68k: lsl/lsr, clear C flag if shift count is 0
   m68k: correct divs.w and divu.w
   m68k: correct flags with negl
   m68k: for bitfield opcodes, correct operands corruption
   m68k: Correct bfclr in register case.
   m68k-linux-user: add '--enable-emulop'
   m68k: correctly compute divsl
   m68k: correctly compute divul
   m68k: add m68030 definition
   m68k: remove dead code
   m68k: remove useless file m68k-qreg.h
   m68k: FPU rework (draft)
   m68k: some FPU debugging macros
   m68k: more tests
   m68k: correct compute gen_bitfield_cc()
   m68k: add fgetexp
   m68k: add fscale
   m68k: correct addsubq
   m68k: add fetox and flogn
   m68k: initialize FRegs, define pickNaN()
   m68k: correct cmpa comparison datatype
   m68k: add flog10
   m68k: add cmpm instruction
   m68k: add ftwotox instruction
   m68k: better fpu traces
   m68k: register source operand is always in extended size
   m68k: add facos instruction
   m68k: add ftan instruction
   m68k: add fsin instruction
   m68k: add fcos instruction
   m68k: correct fpcr update
   m68k: add fmod instruction
   m68k: flush flags before negx instruction.
   m68k: correct fmovemx FP registers order.
   m68k: add fatan instruction
   m68k: correct bfins instruction
   m68k: fcmp correctly compares infinity.
   m68k: allows bfins to manage correctly width = 32
   m68k: add ftentox instruction
   m68k: correctly define and manage NaN
   m68k: don't call gdb_register_coprocessor() twice.
   m68k: gdb FP registers are 96 bits
   m68k: add exg instruction
   m68k: define floatx80_default_inf_high and floatx80_default_inf_low
   m68k: add bkpt instruction
   m68k: correctly convert floatx80<->long double
   m68k: use expl() to compute exp_FP0()
   m68k: use exp2l() to compute exp2_FP0()
   m68k: use logl() to compute ln_FP0()
   m68k: use log10l() to compute log10_FP0()
   m68k: correctly load signed word into floating point register
   m68k: add fcosh instruction
   m68k: add fasin instruction
   m68k: add fsincos instruction
   m68k: add fsinh instruction
   m68k: add ftanh instruction
   m68k: add flognp1 instruction
   m68k: add fatanh instruction
   m68k: first draft of q800 emulation (not working)
   m68k: add movec instruction
   m68k: move from sr can use effective addresse on m68k

Peter Bjørn Jørgensen (1):
   m68k: Added ULL to 64 bit integer in helper.c









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