Re: [Qemu-devel] [PATCH] pci: add standard bridge device

[Michael S. Tsirkin]

On Sun, Sep 04, 2011 at 06:14:22PM +0300, Avi Kivity wrote:
> On 09/04/2011 05:54 PM, Michael S. Tsirkin wrote:
> >>  Way too late.  And also won't work, since often the offset is
> >>  determined by one party and the size by another.
> >
> >For things like BARs, yes - but these don't need to be
> >that big normally. We could add an additinal API
> >that gets first/last parameters. last<  first means 0 size.
> >Feasible?
> 
> Let's defer this for now.
> 
> Does PCI actually have 64-bit addresses?

Yes.

>  Note that most/all cpus don't.
> We may need 65-bit arithmetic for that.

Jut using start/limit carefully should be enough ...


> >
> >>  >VGA I/O addresses (including ISA aliases address - AD[15::10] are not
> >>  >decoded):
> >>  >AD[9::0] = 3B0h through 3BBh and 3C0h through 3DFh
> >>
> >>  These "not decoded" bits mean you need to instantiate tons of
> >>  aliases to implement correctly.
> >>  I plan to add core support for that eventually.
> >
> >There's a flag to enable 16-bit decode actually:
> >bit 4 in bridge control register.
> >How does VGA work at the moment without a bridge? Ignores the ISA aliases?
> >then we can do that too I think.
> >
> 
> Of course it doesn't ignore it.  See the 440fx implementation, if
> you disable VGA access (via the SMRAM register), vga goes away.

Yes but that's for VGA RAM, right? I'm talking about the IO addresses:
are tons of aliases created as you suggest?

> (vga registers its legacy space as a subregion of pci_address_space(dev))
> 
> -- 
> error compiling committee.c: too many arguments to function