[Qemu-devel] [0/9] Preliminary work for IOMMU emulation support; the easy bits (v2)

[David Gibson]

A while back, Eduard - Gabriel Munteanu send a series of patches
implementing support for emulating the AMD IOMMU in conjunction with
qemu emulated PCI devices.  A revised patch series added support for
the Intel IOMMU, and I also send a revised version of this series
which added support for the hypervisor mediated IOMMU on the pseries
machine.

Richard Henderson also weighed in on the discussion, and there's still
a fair bit to be thrashed out in terms of exactly how to set up an
IOMMU / DMA translation subsystem.

However, really only 2 or 3 patches in any of these series have
contained anything interesting.  The rest of the series has been
converting existing PCI emulated devices to use the new DMA interface
which worked through the IOMMU translation, whatever it was.  While we
keep working out what we want for the guts of the IOMMU support, these
device conversion patches keep bitrotting against updates to the
various device implementations themselves.

Really, regardless of whether we're actually implementing IOMMU
translation, it makes sense that qemu code should distinguish between
when it is really operating in CPU physical addresses and when it is
operating in bus or DMA addresses which might have some kind of
translation into physical addresses.

This series, therefore, begins the conversion of existing PCI device
emulation code to use new (stub) pci dma access functions.  These are
for now, just defined to be untranslated cpu physical memory accesses,
as before, but has two advantages:

   * It becomes obvious where the code is working with dma addresses,
     so it's easier to grep for what might be affected by an IOMMU or
     other bus address translation.

   * The new stubs take the PCIDevice *, from which any of the various
     suggested IOMMU interfaces should be able to locate the correct
     IOMMU translation context.

This series only converts the easy cases so far.  That is simple
direct DMA access from device code:
cpu_physical_memory_{read,write}(), ld*_phys() and st*_phys().  It
doesn't handle devices which use the scatter/gather code (just ide and
UHCI, so far).  I plan to address that later, but I have some details
still to work out.

Anthony, please apply.

[Changes since v1]
 - Cleanup up some macro namespace pollution
 - Fixed some bugs where a few DMA accesses had been missed
 - Removed ohci from the series - non-PCI versions of it make it not a
   suitable easy case; it will need to be fixed up in a later pass.