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[Qemu-devel] [PATCH v5 14/33] target-xtensa: implement SYNC group
From: |
Max Filippov |
Subject: |
[Qemu-devel] [PATCH v5 14/33] target-xtensa: implement SYNC group |
Date: |
Tue, 6 Sep 2011 03:55:38 +0400 |
All operations in this group are no-ops, because there are no delayed
side effects.
Signed-off-by: Max Filippov <address@hidden>
---
target-xtensa/translate.c | 31 ++++++++++++++++++++++++++++++-
1 files changed, 30 insertions(+), 1 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 8f92dfb..4f1c18e 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -429,7 +429,36 @@ static void disas_xtensa_insn(DisasContext *dc)
break;
case 2: /*SYNC*/
- TBD();
+ switch (RRR_T) {
+ case 0: /*ISYNC*/
+ break;
+
+ case 1: /*RSYNC*/
+ break;
+
+ case 2: /*ESYNC*/
+ break;
+
+ case 3: /*DSYNC*/
+ break;
+
+ case 8: /*EXCW*/
+ HAS_OPTION(XTENSA_OPTION_EXCEPTION);
+ break;
+
+ case 12: /*MEMW*/
+ break;
+
+ case 13: /*EXTW*/
+ break;
+
+ case 15: /*NOP*/
+ break;
+
+ default: /*reserved*/
+ RESERVED();
+ break;
+ }
break;
case 3: /*RFEIx*/
--
1.7.6
- [Qemu-devel] [PATCH v5 00/32] target-xtensa: new target architecture, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 04/33] target-xtensa: implement narrow instructions, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 02/33] target-xtensa: add target to the configure script, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 07/33] target-xtensa: implement conditional jumps, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 01/33] target-xtensa: add target stubs, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 03/33] target-xtensa: implement disas_xtensa_insn, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 08/33] target-xtensa: implement JX/RET0/CALLX, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 06/33] target-xtensa: add sample board, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 14/33] target-xtensa: implement SYNC group,
Max Filippov <=
- [Qemu-devel] [PATCH v5 11/33] target-xtensa: implement shifts (ST1 and RST1 groups), Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 05/33] target-xtensa: implement RT0 group, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 10/33] target-xtensa: implement RST3 group, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 12/33] target-xtensa: implement LSAI group, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 13/33] target-xtensa: mark reserved and TBD opcodes, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 18/33] target-xtensa: implement RST2 group (32 bit mul/div/rem), Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 30/33] target-xtensa: implement boolean option, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 23/33] target-xtensa: implement SIMCALL, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 22/33] target-xtensa: implement unaligned exception option, Max Filippov, 2011/09/05
- [Qemu-devel] [PATCH v5 26/33] target-xtensa: implement CPENABLE and PRID SRs, Max Filippov, 2011/09/05