Re: [Qemu-devel] [PATCH] KVM: emulate lapic tsc deadline timer for hvm

[Liu, Jinsong]

Avi Kivity wrote:
> On 09/07/2011 07:45 PM, Liu, Jinsong wrote:
>> Avi Kivity wrote:
>>>> 
>>>>  --- a/arch/x86/include/asm/msr-index.h
>>>>  +++ b/arch/x86/include/asm/msr-index.h
>>>>  @@ -229,6 +229,8 @@
>>>>    #define MSR_IA32_APICBASE_ENABLE        (1<<11)
>>>>    #define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
>>>> 
>>>>  +#define MSR_IA32_TSCDEADLINE             0x000006e0
>>>>  +
>>>>    #define MSR_IA32_UCODE_WRITE            0x00000079
>>>>    #define MSR_IA32_UCODE_REV              0x0000008b
>>>> 
>>> 
>>>  Need to add to msrs_to_save so live migration works.
>>> 
>> 
>> 2 questions:
>> 1). how about add to emulated_msrs instead of msrs_to_save?
>> msrs_to_save modified at runtime and depend on capacibility of host
>> cpu.  
> 
> Look at kvm_init_msrs_list(), it does the checks.
> 

Yes, what I mean is, we in fact don't need host cpu support, so it's better to 
add it to emulated_msrs.

>> 2). do we need add code at qemu (kvm_get_msrs/ kvm_put_msrs) to
>> expose MSR_IA32_TSCDEADLINE to userspace? 
>> 
> 
> It should be automatic.  Better check it though that you can
> live-migrate a guest that uses TSC deadline.  Please add a testcase to
> kvm-unit-tests.git (there's x86/apic.c, can probably be added there
> easily).