Re: [Qemu-devel] [PATCH] memory: simple memory tree printer

[Avi Kivity]

On 09/15/2011 12:30 PM, Jan Kiszka wrote:
> On 2011-09-14 21:24, Avi Kivity wrote:
> >  On 09/14/2011 09:10 PM, Jan Kiszka wrote:
> >>  OK, let's try again: Do we have to model hierarchy in PIO address space
> >>  at all? I don't think so.
> >
> >
> >  We do.  A device listens to addresses 0x100-0x110.  Another BAR (at
> >  0x106) clips this to 0x100-0x106.  The pci/pci bridge clips this to
> >  0x105-0x106.
>
> OK, but clipping does not require offsets as it does not register PIO
> regions at different base addresses. It's a pure internal representation
> when flatting the view.

A hierarchy is needed.

> >   The host pci bridge remaps this as
> >  0x1000000105-0x1000000106 in the memory address space space.  But
> >  someone configured a cpu-local region at this address, so the cpu can't
> >  reach it at all.
>
> Mapping PIO into MMIO space is special as it needs an intermediate layer
> (ie. translation handlers).

Translation handlers aren't needed - you can simply add the pci pio 
region as a subregion of the mmio space.

> Anyway, the point is that there are device models out there
> (specifically PCI devices) that already use relative PIO addresses and
> models (specifically ISA) that still expect absolute addresses (/wrt to
> the ISA base). I believe it is better to consolidate over one model
> longterm, but we need a transition phase here as well. However, I'm
> unsure yet if we really need MemoryRegion::offset for that and cannot
> use MemoryRegionPortio::offset. Need to look into the details.

It would be good to get rid of MemoryRegion::offset.

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