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Re: [Qemu-devel] [PATCH v2] memory: simple memory tree printer


From: Blue Swirl
Subject: Re: [Qemu-devel] [PATCH v2] memory: simple memory tree printer
Date: Sun, 18 Sep 2011 14:07:52 +0000

On Sun, Sep 18, 2011 at 1:53 PM, Avi Kivity <address@hidden> wrote:
> On 09/17/2011 10:27 PM, Blue Swirl wrote:
>>
>> Add a monitor command 'info mtree' to show the memory hierarchy
>> much like /proc/iomem in Linux.
>>
>>
>
> Still missing alias support.  PCI would be invisible on a PC (or any machine
> which has PCI holes implemented properly).

Yes, that annoyed me too when debugging the PPC patch. But how should
that look like? Consider for example that in the PPC case, range 0 to
0x80000000 is RAM from CPU point of view but only PCI MMIO space when
looking after the PCI bridge. I/O shouldn't need separate handling if
the CPU does not have PIO instructions, but instead PIO space is
mapped as MMIO as on Sparc64 and PPC. I/O should be visible there.

> Maybe we need to dump both the memory tree and the flat view - the memory
> tree for the logical hierarchy and the flat view to see what actually
> happens (I have an address, where does it go?)

I have some trouble thinking about how to print fully converted,
per-CPU memory trees. Also, if the memory API is fully embraced and
extended to handle DMA and IOMMUs, each device could have a different
view on the system memory. Perhaps the tool should take a device ID
(also CPU ID) as a parameter to give it a starting point.



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