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Re: [Qemu-devel] [PATCH 11/22] i8259: Update IRQ state after reset


From: Blue Swirl
Subject: Re: [Qemu-devel] [PATCH 11/22] i8259: Update IRQ state after reset
Date: Wed, 28 Sep 2011 18:01:42 +0000

On Wed, Sep 28, 2011 at 11:00 AM, Jan Kiszka <address@hidden> wrote:
> As we clearly modify the PIC state on pic_reset, we also have to update
> the IRQ output. This only happened on init so far. Apply this
> consistently.

Nack, IRQ lines shouldn't be touched on reset. The other side may not
be ready for receiving the interrupt change and qemu_irqs are
stateless anyway.

> Signed-off-by: Jan Kiszka <address@hidden>
> ---
>  hw/i8259.c |    3 +--
>  1 files changed, 1 insertions(+), 2 deletions(-)
>
> diff --git a/hw/i8259.c b/hw/i8259.c
> index b7a011f..3498c6b 100644
> --- a/hw/i8259.c
> +++ b/hw/i8259.c
> @@ -283,6 +283,7 @@ static void pic_reset(void *opaque)
>     s->init4 = 0;
>     s->single_mode = 0;
>     /* Note: ELCR is not reset */
> +    pic_update_irq(s->pics_state);
>  }
>
>  static void pic_ioport_write(void *opaque, target_phys_addr_t addr64,
> @@ -298,8 +299,6 @@ static void pic_ioport_write(void *opaque, 
> target_phys_addr_t addr64,
>         if (val & 0x10) {
>             /* init */
>             pic_reset(s);
> -            /* deassert a pending interrupt */
> -            qemu_irq_lower(s->pics_state->pics[0].int_out);
>             s->init_state = 1;
>             s->init4 = val & 1;
>             s->single_mode = val & 2;
> --
> 1.7.3.4
>
>



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