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[Qemu-devel] [PATCH 40/64] PPC: Fix sync instructions problem in SMP
From: |
Alexander Graf |
Subject: |
[Qemu-devel] [PATCH 40/64] PPC: Fix sync instructions problem in SMP |
Date: |
Thu, 6 Oct 2011 10:05:42 +0200 |
From: Elie Richa <address@hidden>
In the current emulation of the load-and-reserve (lwarx) and
store-conditional (stwcx.) instructions, the internal reservation
mechanism is taken into account, however each CPU has its own
reservation information and this information is not synchronized between
CPUs to perform proper synchronization.
The following test case with 2 CPUs shows that the semantics of the
"lwarx" and "stwcx." instructions are not preserved by the emulation.
The test case does the following :
- CPU0: reserve a memory location
- CPU1: reserve the same memory location
- CPU0: perform stwcx. on the location
The last store-conditional operation succeeds while it is supposed to
fail since the reservation was supposed to be lost at the second reserve
operation.
This (one line) patch fixes this problem in a very simple manner by
removing the reservation of a CPU every time it is scheduled (in
cpu_exec()). While this is a harsh workaround, it does not affect the
guest code much because reservations are usually held for a very short
time, that is an lwarx is almost always followed by an stwcx. a few
instructions below. Therefore, in most cases, the reservation will be
taken and consumed before a CPU switch occurs. However in the rare case
where a CPU switch does occur between the lwarx and its corresponding
stwcx. this patch solves a potential erroneous behavior of the
synchronization instructions.
Signed-off-by: Elie Richa <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
cpu-exec.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index aef66f2..a9fa608 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -217,6 +217,7 @@ int cpu_exec(CPUState *env)
#elif defined(TARGET_ARM)
#elif defined(TARGET_UNICORE32)
#elif defined(TARGET_PPC)
+ env->reserve_addr = -1;
#elif defined(TARGET_LM32)
#elif defined(TARGET_MICROBLAZE)
#elif defined(TARGET_MIPS)
--
1.6.0.2
- [Qemu-devel] [PATCH 35/64] PPC: SPAPR: Use KVM function for time info, (continued)
- [Qemu-devel] [PATCH 35/64] PPC: SPAPR: Use KVM function for time info, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 29/64] MPC8544DS: Remove CPU nodes, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 21/64] PPC: KVM: Add stubs for kvm helper functions, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 38/64] pseries: interrupt controller should not have a 'reg' property, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 09/64] PPC: MPIC: Remove read functionality for WO registers, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 31/64] PPC: E500: Bump CPU count to 15, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 23/64] PPC: E500: Remove unneeded CPU nodes, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 24/64] PPC: E500: Add PV spinning code, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 33/64] KVM: update kernel headers, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 36/64] pseries: Bugfixes for interrupt numbering in XICS code, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 40/64] PPC: Fix sync instructions problem in SMP,
Alexander Graf <=
- [Qemu-devel] [PATCH 13/64] PPC: E500: Generate IRQ lines for many CPUs, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 10/64] PPC: MPIC: Fix CI bit definitions, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 03/64] spapr: make irq customizable via qdev, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 34/64] PPC: Enable to use PAPR with PR style KVM, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 37/64] pseries: Add a phandle to the xicp interrupt controller device tree node, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 60/64] PPC: booke timers, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 51/64] ppc405: use RAM_ADDR_FMT instead of %08lx, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 63/64] pseries: Implement set-time-of-day RTAS function, Alexander Graf, 2011/10/06
- [Qemu-devel] [PATCH 59/64] KVM: PPC: Use HIOR setting for -M pseries with PR KVM, Alexander Graf, 2011/10/06