Re: [Qemu-devel] [PATCH] Set an invalid-bits mask for each SPE instructions

[Fabien Chouteau]

On 07/10/2011 14:40, Alexander Graf wrote:
> On 09/28/2011 05:54 PM, Fabien Chouteau wrote:
>> SPE instructions are defined by pairs. Currently, the invalid-bits mask is 
>> set
>> for the first instruction, but the second one can have a different mask.
>>
>> example:
>> GEN_SPE(efdcmpeq,    efdcfs,      0x17, 0x0B, 0x00600000, 0x00180000, 
>> PPC_SPE_DOUBLE),
>>
>> Signed-off-by: Fabien Chouteau<address@hidden>
> 
> It certainly doesn't make the code more ugly than it was before :). Applied 
> to my local ppc-next branch. I take it that you verified all the invalid 
> masks are sane.
> 

Yes I checked all the masks so they should be OK.

> There are some lines exceeding 80 characters, but I'm fairly sure they did 
> before too. So I'll let this slip through for the sake of readability.
> 

For these kind of definition lists the 80 characters limit can result in
very awful code.

Regards,

-- 
Fabien Chouteau