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Re: [Qemu-devel] [PATCH 00/21] Sparc FPU/VIS improvements


From: Blue Swirl
Subject: Re: [Qemu-devel] [PATCH 00/21] Sparc FPU/VIS improvements
Date: Tue, 18 Oct 2011 19:50:53 +0000

On Tue, Oct 18, 2011 at 6:50 PM, Richard Henderson <address@hidden> wrote:
> This started out to be simply flushing out the VIS2 instruction set.
> But when I got a look a the DT0/1 "calling convention" I choked, and
> thought we could really do better than that.
>
> The end result (op_opt,out_asm) looks significantly cleaner for a
> 64-bit host.  It looks about the same for a 32-bit host.
>
> I've been testing this vs the gcc testsuite, both for its generic
> ieee test cases, and the vectorization tests w/ -mvis2.

Excellent patch series.

> Watch out for the last patch.  It was an attempt to get rid of the
> hundreds of tls failures in the gcc testsuite by supporting NPTL.
> Except the clone syscall crashes, and seems to be crashing at a point
> where it's difficult to see what's going wrong.  That patch is
> present here for discussion only.

There is something fishy with Sparc fork() (spork?), I also tried to
fix that in the past several times. Maybe fork() was actually
implemented as vfork()?

> All of this is relative to blueswirl's sparc tree.  Which I think
> should go in as a most excellent cleanup of target-sparc.  I've
> pushed the tree to
>
>  git://repo.or.cz/qemu/rth.git rth/vis

Thanks. Unfortunately I'm not sure I'll be able to fix and push my
series before the freeze, because other than x86_64, none of the TCG
targets implement AREG0 free mode.

>
> r~
>
>
> Richard Henderson (21):
>  target-sparc: Add accessors for single-precision fpr access.
>  target-sparc: Mark fprs dirty in store accessor.
>  target-sparc: Add accessors for double-precision fpr access.
>  target-sparc: Pass float64 parameters instead of dt0/1 temporaries.
>  target-sparc: Make VIS helpers const when possible.
>  target-sparc: Extract common code for floating-point operations.
>  target-sparc: Extract float128 move to a function.
>  target-sparc: Undo cpu_fpr rename.
>  target-sparc: Change fpr representation to doubles.
>  tcg: Optimize some forms of deposit.
>  target-sparc: Do exceptions management fully inside the helpers.
>  sparc-linux-user: Handle SIGILL.
>  target-sparc: Implement PDIST.
>  target-sparc: Implement fpack{16,32,fix}.
>  target-sparc: Implement EDGE* instructions.
>  target-sparc: Implement ALIGNADDR* inline.
>  target-sparc: Implement BMASK/BSHUFFLE.
>  target-sparc: Tidy fpack32.
>  target-sparc: Implement FALIGNDATA inline.
>  sparc-linux-user: Add some missing syscall numbers
>  sparc-linux-user: Enable NPTL
>
>  configure                     |    3 +
>  gdbstub.c                     |   35 +-
>  linux-user/main.c             |    9 +
>  linux-user/signal.c           |   28 +-
>  linux-user/sparc/syscall_nr.h |    3 +
>  linux-user/syscall.c          |   12 +-
>  monitor.c                     |   96 ++--
>  target-sparc/cpu.h            |   38 +-
>  target-sparc/cpu_init.c       |    6 +-
>  target-sparc/fop_helper.c     |  294 ++++++---
>  target-sparc/helper.h         |  120 ++--
>  target-sparc/ldst_helper.c    |  123 +---
>  target-sparc/machine.c        |   20 +-
>  target-sparc/translate.c      | 1461 
> ++++++++++++++++++++++++-----------------
>  target-sparc/vis_helper.c     |  251 +++++---
>  tcg/tcg-op.h                  |   65 ++-
>  16 files changed, 1503 insertions(+), 1061 deletions(-)
>
> --
> 1.7.6.4
>
>



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